Signed and Unsigned in VHDL: Meaning and Usage Explained

In VHDL, signed and unsigned are data types used to represent binary numbers with and without a sign, respectively. signed allows negative and positive values, while unsigned only represents zero or positive values.

How It Works

Think of signed and unsigned in VHDL like numbers on a number line. Unsigned numbers start at zero and go up, like counting apples in a basket—you can't have negative apples. Signed numbers, on the other hand, can go below zero, like a thermometer showing temperatures above and below freezing.

In VHDL, these types are used to tell the computer how to interpret a sequence of bits. Unsigned treats all bits as positive values, while signed uses the most significant bit (leftmost bit) as a sign indicator, meaning it can represent negative numbers using two's complement form.

This difference affects arithmetic operations: adding two unsigned numbers always results in a positive or zero value, but adding signed numbers can result in negative or positive values depending on the inputs.

Example

This example shows how to declare and add signed and unsigned numbers in VHDL.

vhdl

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

entity signed_unsigned_example is
end entity;

architecture behavior of signed_unsigned_example is
  signal a_unsigned : unsigned(3 downto 0) := "0011"; -- 3 in decimal
  signal b_unsigned : unsigned(3 downto 0) := "0101"; -- 5 in decimal
  signal sum_unsigned : unsigned(4 downto 0);

  signal a_signed : signed(3 downto 0) := "0011"; -- 3 in decimal
  signal b_signed : signed(3 downto 0) := "1101"; -- -3 in decimal (two's complement)
  signal sum_signed : signed(4 downto 0);
begin
  sum_unsigned <= ('0' & a_unsigned) + ('0' & b_unsigned); -- extend to 5 bits to hold sum
  sum_signed <= ('0' & a_signed) + ('1' & b_signed(3 downto 1)); -- extend to 5 bits to hold sum with sign extension
end architecture;

Output

sum_unsigned = "01000" -- decimal 8
sum_signed = "00000" -- decimal 0

When to Use

Use unsigned when you know your values will never be negative, such as counting items, addresses, or sizes. This keeps your design simple and efficient.

Use signed when you need to represent values that can be negative, like temperature readings, signed arithmetic calculations, or any situation where values can go below zero.

Choosing the right type helps avoid errors in calculations and ensures your hardware behaves as expected.

Key Points

• Unsigned represents only zero or positive numbers.
• Signed can represent negative and positive numbers using two's complement.
• Arithmetic operations differ based on the type chosen.
• Choosing the correct type prevents logic errors in digital designs.

Key Takeaways

Signed and unsigned types define how binary numbers are interpreted in VHDL.

Use unsigned for non-negative values and signed for values that can be negative.

Signed numbers use the most significant bit as a sign indicator with two's complement.

Choosing the correct type ensures correct arithmetic and hardware behavior.