What is Mealy Machine in VHDL: Explanation and Example

A Mealy machine in VHDL is a type of finite state machine where the outputs depend on both the current state and the current inputs. It reacts immediately to input changes, producing outputs that can change without waiting for a state transition.

How It Works

A Mealy machine is like a vending machine that gives you a snack based on both the button you press and the current state of the machine. In VHDL, this means the output signals depend on the current state and the inputs at the same time.

Think of it as a system that watches the inputs closely and can change its outputs right away, without waiting for the state to change. This makes Mealy machines faster in reacting to inputs compared to other types like Moore machines, where outputs depend only on the state.

Example

This example shows a simple Mealy machine in VHDL that outputs a signal z which is high when the input x is high and the machine is in state S1.

vhdl

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

entity MealyMachine is
    Port (
        clk : in STD_LOGIC;
        reset : in STD_LOGIC;
        x : in STD_LOGIC;
        z : out STD_LOGIC
    );
end MealyMachine;

architecture Behavioral of MealyMachine is
    type state_type is (S0, S1);
    signal state, next_state : state_type;
begin
    -- State register
    process(clk, reset)
    begin
        if reset = '1' then
            state <= S0;
        elsif rising_edge(clk) then
            state <= next_state;
        end if;
    end process;

    -- Next state logic
    process(state, x)
    begin
        case state is
            when S0 =>
                if x = '1' then
                    next_state <= S1;
                else
                    next_state <= S0;
                end if;
            when S1 =>
                if x = '0' then
                    next_state <= S0;
                else
                    next_state <= S1;
                end if;
        end case;
    end process;

    -- Output logic (depends on state and input)
    process(state, x)
    begin
        if (state = S1) and (x = '1') then
            z <= '1';
        else
            z <= '0';
        end if;
    end process;
end Behavioral;

Output

When input x is '1' and state is S1, output z is '1'; otherwise, z is '0'.

When to Use

Use a Mealy machine in VHDL when you need outputs that respond immediately to input changes without waiting for a clock edge or state change. This is useful in control systems, communication protocols, or any design where fast reaction to inputs is important.

For example, in a traffic light controller, a Mealy machine can change the light signals instantly when sensors detect cars, improving traffic flow.

Key Points

• Mealy machine outputs depend on current state and inputs.
• Outputs can change immediately when inputs change.
• Usually faster response than Moore machines.
• Implemented in VHDL using combinational logic for outputs.
• Good for designs needing quick output changes.

Key Takeaways

A Mealy machine's outputs depend on both state and inputs for immediate response.

In VHDL, Mealy machines use combinational logic for outputs and sequential logic for state updates.

Use Mealy machines when fast reaction to input changes is required.

Outputs can change without waiting for a clock edge or state transition.

Mealy machines are common in control and communication systems.