VHDL Code for Binary to Gray Converter: Syntax and Example

A binary to Gray code converter in VHDL can be implemented by XORing each bit of the binary input with the next higher bit. The most significant bit of the Gray code is the same as the binary input's MSB. This logic can be coded using simple bitwise operations in a process or concurrent assignment.

Syntax

The basic syntax for a binary to Gray code converter in VHDL involves defining an input vector for the binary number and an output vector for the Gray code. The conversion uses bitwise XOR operations between adjacent bits.

• entity: Declares input and output ports.
• architecture: Contains the logic for conversion.
• signal: Used for internal wiring if needed.
• process or concurrent assignment: Implements the XOR logic.

vhdl

entity BinaryToGray is
    Port ( binary_in : in  STD_LOGIC_VECTOR(3 downto 0);
           gray_out : out STD_LOGIC_VECTOR(3 downto 0));
end BinaryToGray;

architecture Behavioral of BinaryToGray is
begin
    gray_out(3) <= binary_in(3);
    gray_out(2) <= binary_in(3) xor binary_in(2);
    gray_out(1) <= binary_in(2) xor binary_in(1);
    gray_out(0) <= binary_in(1) xor binary_in(0);
end Behavioral;

Example

This example shows a 4-bit binary to Gray code converter. It takes a 4-bit binary input and outputs the corresponding 4-bit Gray code using XOR operations.

vhdl

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

entity BinaryToGray is
    Port ( binary_in : in  STD_LOGIC_VECTOR(3 downto 0);
           gray_out : out STD_LOGIC_VECTOR(3 downto 0));
end BinaryToGray;

architecture Behavioral of BinaryToGray is
begin
    gray_out(3) <= binary_in(3);
    gray_out(2) <= binary_in(3) xor binary_in(2);
    gray_out(1) <= binary_in(2) xor binary_in(1);
    gray_out(0) <= binary_in(1) xor binary_in(0);
end Behavioral;

Output

For binary_in = "0000", gray_out = "0000"
For binary_in = "0001", gray_out = "0001"
For binary_in = "0010", gray_out = "0011"
For binary_in = "0011", gray_out = "0010"
For binary_in = "0100", gray_out = "0110"
For binary_in = "0101", gray_out = "0111"
For binary_in = "0110", gray_out = "0101"
For binary_in = "0111", gray_out = "0100"
For binary_in = "1000", gray_out = "1100"
For binary_in = "1001", gray_out = "1101"
For binary_in = "1010", gray_out = "1111"
For binary_in = "1011", gray_out = "1110"
For binary_in = "1100", gray_out = "1010"
For binary_in = "1101", gray_out = "1011"
For binary_in = "1110", gray_out = "1001"
For binary_in = "1111", gray_out = "1000"

Common Pitfalls

Common mistakes when writing a binary to Gray converter in VHDL include:

• Forgetting that the most significant Gray bit equals the most significant binary bit.
• Incorrect indexing of bits causing wrong XOR operations.
• Using signed instead of STD_LOGIC_VECTOR without proper conversion.
• Not handling vector ranges consistently (downto vs to).

vhdl

Wrong approach example:

architecture Wrong of BinaryToGray is
begin
    -- Incorrect: XORing bits in wrong order
    gray_out(3) <= binary_in(0);
    gray_out(2) <= binary_in(1) xor binary_in(2);
    gray_out(1) <= binary_in(2) xor binary_in(3);
    gray_out(0) <= binary_in(3) xor binary_in(0);
end Wrong;

Correct approach:

architecture Correct of BinaryToGray is
begin
    gray_out(3) <= binary_in(3);
    gray_out(2) <= binary_in(3) xor binary_in(2);
    gray_out(1) <= binary_in(2) xor binary_in(1);
    gray_out(0) <= binary_in(1) xor binary_in(0);
end Correct;

Quick Reference

Concept	Description
MSB of Gray code	Same as MSB of binary input
Gray bit i	XOR of binary bit i+1 and bit i
Input type	STD_LOGIC_VECTOR for binary input
Output type	STD_LOGIC_VECTOR for Gray code output
Bit indexing	Use consistent downto direction

Key Takeaways

The most significant Gray code bit equals the most significant binary input bit.

Each Gray code bit is the XOR of the current binary bit and the next higher bit.

Use STD_LOGIC_VECTOR and consistent bit indexing in VHDL.

Avoid mixing bit order or incorrect XOR pairs to prevent wrong output.

Simple concurrent assignments can implement the converter efficiently.