Moore Machine in Verilog: Definition and Example

A Moore machine in Verilog is a finite state machine where outputs depend only on the current state, not on inputs. It is modeled using states and transitions, with outputs assigned inside state blocks. This makes output behavior stable and predictable.

How It Works

A Moore machine works like a vending machine that shows a fixed display depending on its current step, regardless of what button you press at that moment. It has a set of states, and each state has a fixed output. The machine changes states based on inputs, but the output depends only on the state it is in.

In Verilog, you create a Moore machine by defining states and using a clock to move between them. Outputs are assigned inside the state logic, so they update only when the state changes. This separation makes the design easier to understand and debug.

Example

This example shows a simple Moore machine with two states that toggle an output signal every clock cycle.

verilog

module moore_machine(
    input wire clk,
    input wire reset,
    output reg out
);

    typedef enum logic [0:0] {S0, S1} state_t;
    state_t state, next_state;

    // State transition logic
    always_ff @(posedge clk or posedge reset) begin
        if (reset)
            state <= S0;
        else
            state <= next_state;
    end

    // Next state logic
    always_comb begin
        case(state)
            S0: next_state = S1;
            S1: next_state = S0;
            default: next_state = S0;
        endcase
    end

    // Output logic depends only on state (Moore)
    always_comb begin
        case(state)
            S0: out = 1'b0;
            S1: out = 1'b1;
            default: out = 1'b0;
        endcase
    end

endmodule

Output

On each clock cycle, output 'out' toggles between 0 and 1 starting from 0 after reset.

When to Use

Use a Moore machine in Verilog when you want outputs that are stable and only change at state transitions. This is helpful in control systems, communication protocols, and digital circuits where output glitches must be avoided.

For example, a traffic light controller or a simple sequence detector often uses a Moore machine to keep outputs steady and predictable.

Key Points

• Outputs depend only on the current state, not inputs.
• State transitions happen on clock edges.
• Outputs are assigned inside state logic blocks.
• Moore machines provide stable and glitch-free outputs.

Key Takeaways

A Moore machine's outputs depend only on its current state, ensuring stable output.

In Verilog, outputs are assigned inside state blocks, separate from input logic.

Moore machines are ideal for designs needing predictable and glitch-free outputs.

State transitions occur on clock edges, making timing clear and reliable.