Verilog Code for BCD Adder: Syntax, Example, and Tips

A bcd adder in Verilog adds two 4-bit BCD digits and outputs a 4-bit sum and a carry. It uses binary addition followed by correction if the sum exceeds 9 by adding 6. The Verilog code implements this logic using combinational statements.

Syntax

The BCD adder module takes two 4-bit inputs and a carry-in, then outputs a 4-bit sum and a carry-out. It adds the inputs as binary numbers, checks if the sum is greater than 9 or if there is a carry, and adds 6 to correct the result to valid BCD.

• Inputs: a, b (4-bit BCD digits), cin (carry in)
• Outputs: sum (4-bit BCD sum), cout (carry out)
• Internal: binary_sum is the raw binary addition result

verilog

module bcd_adder(
    input [3:0] a, b,
    input cin,
    output reg [3:0] sum,
    output reg cout
);

    reg [4:0] binary_sum;

    always @(*) begin
        binary_sum = a + b + cin;  // Add inputs as binary
        if (binary_sum > 9) begin
            binary_sum = binary_sum + 6;  // Add 6 for BCD correction
            cout = 1;
        end else begin
            cout = 0;
        end
        sum = binary_sum[3:0];  // Take lower 4 bits as BCD sum
    end
endmodule

Example

This example shows a testbench that adds two BCD digits 5 and 7 with no initial carry. It demonstrates the BCD adder correcting the sum from binary 12 to BCD 2 with a carry out.

verilog

module testbench;
    reg [3:0] a, b;
    reg cin;
    wire [3:0] sum;
    wire cout;

    bcd_adder uut(.a(a), .b(b), .cin(cin), .sum(sum), .cout(cout));

    initial begin
        a = 4'd5;  // BCD 5
        b = 4'd7;  // BCD 7
        cin = 0;
        #10;
        $display("a = %d, b = %d, cin = %b => sum = %d, cout = %b", a, b, cin, sum, cout);
        $finish;
    end
endmodule

Output

a = 5, b = 7, cin = 0 => sum = 2, cout = 1

Common Pitfalls

Common mistakes when writing a BCD adder include:

• Not adding 6 for correction when sum > 9, which leads to invalid BCD output.
• Ignoring the carry out signal, which is important for multi-digit BCD addition.
• Using binary addition result directly without correction.

Always check if the sum exceeds 9 or if there is a carry, then add 6 to fix the BCD sum.

verilog

/* Wrong approach: No correction added */
module wrong_bcd_adder(
    input [3:0] a, b,
    input cin,
    output reg [3:0] sum,
    output reg cout
);
    always @(*) begin
        {cout, sum} = a + b + cin;  // Direct binary addition without correction
    end
endmodule

/* Correct approach: Add 6 if sum > 9 */
module correct_bcd_adder(
    input [3:0] a, b,
    input cin,
    output reg [3:0] sum,
    output reg cout
);
    reg [4:0] binary_sum;
    always @(*) begin
        binary_sum = a + b + cin;
        if (binary_sum > 9) begin
            binary_sum = binary_sum + 6;
            cout = 1;
        end else begin
            cout = 0;
        end
        sum = binary_sum[3:0];
    end
endmodule

Quick Reference

• BCD digits range from 0 to 9 (4 bits).
• Add inputs as binary, then check if sum > 9 or carry is set.
• If sum > 9, add 6 (0110 binary) to correct the sum.
• Output the lower 4 bits as the BCD sum and set carry out accordingly.

Key Takeaways

Add two 4-bit BCD digits as binary and correct sums greater than 9 by adding 6.

Always output the lower 4 bits as the BCD sum and set carry out if correction occurs.

Ignoring BCD correction leads to invalid decimal results in BCD format.

Use combinational logic with always @(*) block for clean BCD adder design.