VerilogHow-ToBeginner · 3 min read

How to Use $display in Verilog: Syntax and Examples

In Verilog, $display is used to print text and variable values to the simulation console during runtime. You write $display("format string", variables); where the format string can include placeholders like %d for decimal numbers. It helps you see what's happening inside your design while simulating.

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Syntax

The basic syntax of $display is:

$display("format string", variables);

Here:

format string: A string with text and format specifiers like %d (decimal), %b (binary), %h (hexadecimal), or %s (string).
variables: The values you want to print, matching the format specifiers in order.

$display prints the message followed by a newline.

verilog

$display("Value of a = %d", a);

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Example

This example shows how to use $display to print variable values during simulation:

verilog

module test_display;
  reg [3:0] a = 4'b1010;
  reg [7:0] b = 8'hFF;

  initial begin
    $display("Starting simulation...");
    $display("Value of a in decimal: %d", a);
    $display("Value of a in binary: %b", a);
    $display("Value of b in hex: %h", b);
    $display("Simulation done.");
  end
endmodule

Output

Starting simulation... Value of a in decimal: 10 Value of a in binary: 1010 Value of b in hex: ff Simulation done.

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Common Pitfalls

Common mistakes when using $display include:

Not matching the number of format specifiers with variables, causing incorrect output or simulation errors.
Using incorrect format specifiers for the variable type (e.g., using %d for a string).
Forgetting that $display adds a newline automatically, so using it inside loops may produce many lines.

verilog

/* Wrong usage: missing variable for format specifier */
$display("Value is %d and %b", a); // Missing second variable

/* Correct usage: provide all variables */
$display("Value is %d and %b", a, b);

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Quick Reference

Format Specifier	Meaning	Example
%d	Decimal integer	$display("%d", 10); // prints 10
%b	Binary number	$display("%b", 4'b1010); // prints 1010
%h	Hexadecimal number	$display("%h", 8'hFF); // prints FF
%s	String	$display("%s", "hello"); // prints hello
%c	Character	$display("%c", 65); // prints A

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Key Takeaways

Use $display to print messages and variable values during Verilog simulation.

Match format specifiers like %d, %b, %h with the correct variable types.

Always provide the same number of variables as format specifiers to avoid errors.

$display automatically adds a newline after printing.

Use $display inside initial or always blocks to debug your design.