What is Mealy Machine in Verilog: Explanation and Example

A Mealy machine in Verilog is a type of finite state machine where the outputs depend on both the current state and the current inputs. It produces outputs immediately when inputs change, unlike a Moore machine which depends only on the state.

How It Works

A Mealy machine is like a vending machine that gives you a snack as soon as you press a button, not just when it reaches a certain step inside. It has states that remember what it is doing, but it also looks at the current input to decide what output to give right away.

In Verilog, this means the output signals are calculated using both the current state and the inputs. This allows the machine to react faster because outputs can change immediately when inputs change, without waiting for a state change.

Example

This example shows a simple Mealy machine in Verilog that outputs 1 when the input in is 1 and the state is 0, otherwise outputs 0. The output changes immediately with the input.

verilog

module mealy_machine(
    input wire clk,
    input wire reset,
    input wire in,
    output reg out
);

    typedef enum reg [0:0] {S0, S1} state_t;
    state_t state, next_state;

    // State transition logic
    always @(posedge clk or posedge reset) begin
        if (reset)
            state <= S0;
        else
            state <= next_state;
    end

    // Next state and output logic (Mealy: output depends on state and input)
    always @(*) begin
        case(state)
            S0: begin
                out = in ? 1'b1 : 1'b0;
                next_state = in ? S1 : S0;
            end
            S1: begin
                out = 1'b0;
                next_state = S0;
            end
            default: begin
                out = 1'b0;
                next_state = S0;
            end
        endcase
    end
endmodule

Output

When input 'in' is 1 and state is S0, output 'out' is 1 immediately; otherwise, output is 0.

When to Use

Use a Mealy machine in Verilog when you need outputs to respond quickly to input changes without waiting for a clock edge or state update. This is useful in control circuits where immediate reaction is important, like in communication protocols or simple controllers.

Because outputs depend on inputs directly, Mealy machines can be more efficient and use fewer states than Moore machines for the same behavior.

Key Points

• Mealy machine outputs depend on both current state and inputs.
• Outputs can change immediately when inputs change.
• Typically faster response than Moore machines.
• Implemented in Verilog using combinational logic for outputs.
• Useful for control logic needing quick output updates.

Key Takeaways

A Mealy machine's outputs depend on current state and inputs for immediate response.

In Verilog, outputs are generated using combinational logic based on state and inputs.

Use Mealy machines when fast output reaction to inputs is required.

They often need fewer states than Moore machines for the same function.

Mealy machines are ideal for control systems and communication protocols.