How to Use readmemh in Verilog: Syntax and Example

In Verilog, use the $readmemh system task to load hexadecimal data from a text file into a memory array. It reads the file line by line and stores the values into the specified memory starting at index zero or a given offset. This is useful for initializing memories or ROMs in simulations.

Syntax

The basic syntax of $readmemh is:

• $readmemh("filename", memory_array, start_address, end_address);

Explanation:

• filename: The path to the hex data file as a string.
• memory_array: The Verilog memory variable (usually a reg array) to load data into.
• start_address (optional): The starting index in the memory array to begin loading data.
• end_address (optional): The ending index in the memory array to stop loading data.

If start_address and end_address are omitted, loading starts at index 0 and continues until the file ends or memory is full.

verilog

$readmemh("data.hex", memory_array, start_address, end_address);

Example

This example shows how to use $readmemh to load a hex file into a memory array and display the loaded values.

verilog

module test_readmemh;
  reg [7:0] memory [0:7]; // 8 bytes memory
  integer i;

  initial begin
    // Load hex data from file 'memory_data.hex' into memory array
    $readmemh("memory_data.hex", memory);

    // Display loaded memory contents
    $display("Memory contents after $readmemh:");
    for (i = 0; i < 8; i = i + 1) begin
      $display("memory[%0d] = %h", i, memory[i]);
    end

    $finish;
  end
endmodule

Output

Memory contents after $readmemh:
memory[0] = 1a
memory[1] = 2b
memory[2] = 3c
memory[3] = 4d
memory[4] = 5e
memory[5] = 6f
memory[6] = 70
memory[7] = 81

Common Pitfalls

• File path errors: The filename must be correct and accessible; otherwise, $readmemh will not load data.
• Data format: The file must contain valid hexadecimal values separated by spaces or new lines.
• Memory size mismatch: Ensure the memory array is large enough to hold all data from the file.
• Indexing: If using start_address and end_address, make sure they are within the memory bounds.
• Simulation tool support: Some simulators may require the file to be in the working directory or specified with a relative path.

verilog

/* Wrong usage example: file missing or wrong path */
initial begin
  $readmemh("wrong_path.hex", memory);
end

/* Correct usage example: valid file path and memory size */
initial begin
  $readmemh("memory_data.hex", memory);
end

Quick Reference

$readmemh loads hex data from a file into a memory array for simulation initialization.

• Use double quotes for the filename.
• Memory array must be declared as reg [width-1:0] array_name [0:size-1].
• Optional start and end addresses control where data loads.
• File format: hex values separated by spaces or new lines.
• Commonly used for ROM or RAM initialization in testbenches.

Key Takeaways

Use $readmemh to load hexadecimal data from a file into a Verilog memory array for simulation.

The filename must be correct and the file must contain valid hex values separated by spaces or new lines.

You can specify optional start and end addresses to control where data loads in the memory.

Ensure the memory array size matches or exceeds the data size in the file to avoid overflow.

Commonly used in testbenches to initialize ROM or RAM contents before simulation.