Blocking vs non-blocking assignment in Verilog

Introduction

Blocking and non-blocking assignments control how values update in Verilog code. They help decide if statements run one after another or all at once.

When writing combinational logic where order matters, use blocking assignments.

When writing sequential logic like flip-flops, use non-blocking assignments.

When you want to avoid race conditions in hardware simulation.

When modeling circuits that update all signals simultaneously.

When debugging timing issues in your design.

Syntax

Verilog

blocking assignment: variable = expression;
non-blocking assignment: variable <= expression;

Blocking assignments use the '=' sign and execute statements in order.

Non-blocking assignments use the '<=' sign and update variables after all right-hand sides are evaluated.

Examples

Shows the difference in syntax between blocking and non-blocking assignments.

Verilog

a = b + c;  // blocking assignment
x <= y + z; // non-blocking assignment

Blocking assignments used in combinational logic inside an always block.

Verilog

always @(*) begin
  sum = a + b;  // blocking
  carry = (a & b);
end

Non-blocking assignment used in sequential logic triggered by clock edge.

Verilog

always @(posedge clk) begin
  q <= d;  // non-blocking
end

Sample Program

This program shows how blocking assignments update variables immediately and in order, while non-blocking assignments update all variables together after the block finishes.

Verilog

module test;
  reg a, b, c;
  reg x, y, z;

  initial begin
    a = 1; b = 0; c = 1;
    x = 0; y = 1; z = 0;

    // Blocking assignments
    a = b;
    b = c;
    c = a;

    $display("After blocking: a=%b b=%b c=%b", a, b, c);

    // Reset values
    a = 1; b = 0; c = 1;

    // Non-blocking assignments
    a <= b;
    b <= c;
    c <= a;

    #1; // wait for non-blocking updates
    $display("After non-blocking: a=%b b=%b c=%b", a, b, c);
  end
endmodule

Important Notes

Blocking assignments run one after another, so the next line sees the updated value.

Non-blocking assignments schedule updates to happen later, so all right sides use old values.

Use blocking for combinational logic and non-blocking for sequential logic to avoid bugs.

Summary

Blocking assignments use '=' and run statements in order, updating variables immediately.

Non-blocking assignments use '<=' and update variables after evaluating all right sides.

Choose blocking for combinational logic and non-blocking for sequential logic to model hardware correctly.