Blocking assignments help you write simple, step-by-step logic that runs in order. They are best for describing combinational circuits where outputs change immediately when inputs change.
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When to use blocking (combinational) in Verilog
Introduction
When you want to model combinational logic like adders or multiplexers.
When you need the assignments to happen one after another in the same block.
When you want to avoid unintended delays in your logic.
When you want to write clear and simple code for combinational circuits.
When you want to ensure outputs update immediately based on inputs.
Syntax
Verilog
always @(*) begin a = b + c; d = a & e; end
Use '=' for blocking assignments inside always blocks.
The statements run in order, one after another.
Examples
Simple combinational logic for sum and carry using blocking assignments.
Verilog
always @(*) begin
sum = a + b;
carry = (a & b);
endOutput depends immediately on inputs x and y, updated step-by-step.
Verilog
always @(*) begin temp = x | y; out = ~temp; end
Sample Program
This example shows a combinational logic block using blocking assignment. The output y updates immediately when inputs change.
Verilog
module comb_logic(input wire a, b, c, output reg y); always @(*) begin y = (a & b) | c; end endmodule // Testbench module test; reg a, b, c; wire y; comb_logic uut(a, b, c, y); initial begin a = 0; b = 0; c = 0; #1 $display("a=%b b=%b c=%b => y=%b", a, b, c, y); a = 1; b = 0; c = 0; #1 $display("a=%b b=%b c=%b => y=%b", a, b, c, y); a = 1; b = 1; c = 0; #1 $display("a=%b b=%b c=%b => y=%b", a, b, c, y); a = 0; b = 0; c = 1; #1 $display("a=%b b=%b c=%b => y=%b", a, b, c, y); end endmodule
OutputSuccess
Important Notes
Blocking assignments run in order, so the next line sees the updated value immediately.
Use blocking assignments only for combinational logic to avoid simulation mismatches.
Do not mix blocking and non-blocking assignments in the same always block.
Summary
Use blocking assignments (=) for combinational logic inside always @(*) blocks.
They execute statements one by one, updating values immediately.
This helps model circuits where outputs depend instantly on inputs.