Down counter design in Verilog

Introduction

A down counter counts numbers backward, from a higher number down to zero. It helps track time or events in reverse order.

To count down seconds in a timer or clock.

To track remaining items in a stock or inventory.

To create a countdown before an event starts.

To measure how many steps are left in a process.

Syntax

Verilog

module down_counter(
    input wire clk,
    input wire reset,
    output reg [3:0] count
);

always @(posedge clk or posedge reset) begin
    if (reset) begin
        count <= 4'b1111; // start from 15
    end else if (count > 0) begin
        count <= count - 1;
    end
end

endmodule

clk is the clock signal that triggers counting.

reset sets the counter back to the start value.

Examples

Initialize the counter to 15 in 4-bit binary.

Verilog

count <= 4'b1111; // start from 15

Decrease the count by 1 only if it is above zero.

Verilog

if (count > 0) count <= count - 1;

Simple down counter without reset or limit checks.

Verilog

always @(posedge clk) begin
    count <= count - 1;
end

Sample Program

This program defines a 4-bit down counter starting at 15. The testbench toggles the clock and releases reset after 10 time units. The count decreases every clock cycle until it reaches zero.

Verilog

module down_counter(
    input wire clk,
    input wire reset,
    output reg [3:0] count
);

always @(posedge clk or posedge reset) begin
    if (reset) begin
        count <= 4'b1111; // start from 15
    end else if (count > 0) begin
        count <= count - 1;
    end
end

endmodule

// Testbench
module testbench();
    reg clk = 0;
    reg reset = 1;
    wire [3:0] count;

    down_counter dc(.clk(clk), .reset(reset), .count(count));

    always #5 clk = ~clk; // clock toggles every 5 time units

    initial begin
        $monitor($time, " Count = %d", count);
        #10 reset = 0; // release reset after 10 time units
        #150 $finish;
    end
endmodule

Important Notes

The counter stops at zero and does not go negative.

Reset is asynchronous and sets the count immediately.

Clock signal controls when the count changes.

Summary

A down counter counts backward from a start number to zero.

Use a clock and reset to control counting.

Check count value to stop counting at zero.