Flip-flops can hold one bit of information by storing a value until it is changed. This makes them the basic building blocks for memory in digital circuits.
Why flip-flops are the basis of memory in Verilog
module d_flip_flop(
input wire clk,
input wire d,
output reg q
);
always @(posedge clk) begin
q <= d;
end
endmoduleThis is a simple D flip-flop in Verilog that stores the input d on the rising edge of the clock clk.
The output q holds the stored value until the next clock edge.
d on clock rising edge.module d_flip_flop(
input wire clk,
input wire d,
output reg q
);
always @(posedge clk) begin
q <= d;
end
endmodulemodule d_flip_flop_with_reset(
input wire clk,
input wire rst,
input wire d,
output reg q
);
always @(posedge clk or posedge rst) begin
if (rst) q <= 0;
else q <= d;
end
endmoduleThis testbench toggles the clock and changes input d. The flip-flop stores the value of d at each rising clock edge and outputs it on q.
module test_flip_flop;
reg clk = 0;
reg d = 0;
wire q;
d_flip_flop uut (
.clk(clk),
.d(d),
.q(q)
);
always #5 clk = ~clk; // Clock toggles every 5 time units
initial begin
$monitor($time, ": d=%b q=%b", d, q);
d = 0; #10;
d = 1; #10;
d = 0; #10;
d = 1; #10;
$finish;
end
endmodule
module d_flip_flop(
input wire clk,
input wire d,
output reg q
);
always @(posedge clk) begin
q <= d;
end
endmoduleFlip-flops store data only on clock edges, so output changes happen synchronized with the clock.
They keep their output stable between clock edges, acting like memory cells.
Combining many flip-flops lets you build larger memory like registers and RAM.
Flip-flops hold one bit of data by storing input on clock edges.
This ability to remember data makes them the foundation of digital memory.
They are used everywhere in digital circuits to build memory and state machines.