State encoding (binary, one-hot, gray) in Verilog

Introduction

State encoding helps a digital circuit remember what it is doing by assigning simple codes to each step. It makes the circuit easier to build and understand.

When designing a traffic light controller to manage different light states.

When creating a vending machine that moves through steps like waiting for money, selecting product, and giving change.

When building a simple game controller that tracks player moves.

When programming a washing machine cycle with different washing stages.

Syntax

Verilog

typedef enum logic [N-1:0] {
  STATE_0 = code_0,
  STATE_1 = code_1,
  ...
} state_type;

state_type current_state, next_state;

Binary encoding: Uses the smallest number of bits, counting up in binary.

One-hot encoding: Uses one bit per state, only one bit is '1' at a time.

Gray encoding: Changes only one bit between states to reduce errors.

Examples

This is binary encoding with 2 bits for 3 states.

Verilog

typedef enum logic [1:0] {
  IDLE = 2'b00,
  RUN = 2'b01,
  STOP = 2'b10
} state_t;

This is one-hot encoding with 3 bits, one bit per state.

Verilog

typedef enum logic [2:0] {
  IDLE = 3'b001,
  RUN = 3'b010,
  STOP = 3'b100
} state_t;

This is gray encoding where only one bit changes between states.

Verilog

typedef enum logic [1:0] {
  IDLE = 2'b00,
  RUN = 2'b01,
  STOP = 2'b11
} state_t;

Sample Program

This simple FSM cycles through three states using binary encoding. It moves from IDLE to RUN, then STOP, then back to IDLE.

Verilog

module fsm_example(
  input logic clk, reset,
  output logic [1:0] state_out
);

  typedef enum logic [1:0] {
    IDLE = 2'b00,    // binary encoding
    RUN = 2'b01,
    STOP = 2'b10
  } state_t;

  state_t current_state, next_state;

  always_ff @(posedge clk or posedge reset) begin
    if (reset)
      current_state <= IDLE;
    else
      current_state <= next_state;
  end

  always_comb begin
    case (current_state)
      IDLE: next_state = RUN;
      RUN: next_state = STOP;
      STOP: next_state = IDLE;
      default: next_state = IDLE;
    endcase
  end

  assign state_out = current_state;

endmodule

Important Notes

One-hot encoding uses more bits but can make circuits faster and simpler.

Gray encoding helps reduce errors when states change by only flipping one bit at a time.

Binary encoding is compact but may cause more complex logic for state transitions.

Summary

State encoding assigns codes to states to help digital circuits remember steps.

Binary encoding uses few bits, one-hot uses one bit per state, gray changes one bit at a time.

Choose encoding based on circuit size, speed, and complexity needs.

Practice

1.

Which state encoding method uses exactly one bit set to 1 for each state, and all other bits are 0?

easy

A. One-hot encoding

B. Binary encoding

C. Gray encoding

D. Thermometer encoding

Solution

1. Step 1: Understand one-hot encoding definition

   One-hot encoding assigns a unique bit to each state, where only one bit is high (1) and the rest are low (0).

2. Step 2: Compare with other encodings

   Binary encoding uses multiple bits to represent states in binary form; Gray encoding changes only one bit between states; Thermometer encoding is different and not the one-hot method.

3. Final Answer:

   One-hot encoding -> Option A

4. Quick Check:

   One-hot = single 1 bit per state [OK]

Hint: One-hot means only one bit is 1 at a time [OK]

Common Mistakes:

• Confusing binary encoding with one-hot
• Thinking Gray encoding sets only one bit
• Mixing thermometer encoding with one-hot

2.

Which of the following is the correct Verilog declaration for a 3-bit binary encoded state register named state?

easy

A. reg state[2:0];

B. reg [3:0] state;

C. reg [2:0] state;

D. wire [2:0] state;

Solution

1. Step 1: Understand Verilog register declaration

   For a 3-bit register, the correct syntax is reg [2:0] name; where bits are indexed from 2 down to 0.

2. Step 2: Check options for correctness

   reg [2:0] state; uses reg [2:0] state; which is correct. reg [3:0] state; declares 4 bits, wire [2:0] state; uses wire (not register), and reg state[2:0]; has incorrect syntax.

3. Final Answer:

   reg [2:0] state; -> Option C

4. Quick Check:

   3-bit reg = reg [2:0] name [OK]

Hint: Use reg [N-1:0] for N-bit registers in Verilog [OK]

Common Mistakes:

• Using wire instead of reg for state storage
• Incorrect bit range syntax
• Confusing array declaration with bit vector

3.

Given the following Verilog snippet using one-hot encoding for 4 states, what is the value of state after the first clock cycle if the initial state is 4'b0001 and the next state logic shifts the 1 bit left by one position?

reg [3:0] state = 4'b0001;
always @(posedge clk) begin
  state <= {state[2:0], state[3]};
end

medium

A. 4'b0001

B. 4'b0100

C. 4'b1000

D. 4'b0010

Solution

1. Step 1: Understand the shift operation in the code

   The assignment state <= {state[2:0], state[3]}; shifts bits left by one, moving bit 0 to bit 1, bit 1 to bit 2, bit 2 to bit 3, and bit 3 to bit 0.

2. Step 2: Apply the shift to initial state 4'b0001

   Initial bits: bit3=0, bit2=0, bit1=0, bit0=1. After shift: bit3=bit2=0, bit2=bit1=0, bit1=bit0=1, bit0=bit3=0 -> 4'b0010.

3. Final Answer:

   4'b0010 -> Option D

4. Quick Check:

   Shift left one bit in one-hot = 4'b0010 [OK]

Hint: Shift bits left, wrap last bit to first [OK]

Common Mistakes:

• Forgetting bit wrap-around
• Confusing bit order in concatenation
• Assuming no change after clock

4.

Identify the error in the following Verilog code snippet that attempts to implement Gray code state encoding for 3 states:

reg [1:0] state;
always @(posedge clk) begin
  case(state)
    2'b00: state <= 2'b01;
    2'b01: state <= 2'b11;
    2'b11: state <= 2'b10;
    2'b10: state <= 2'b01;
    default: state <= 2'b00;
  endcase
end

medium

A. State transitions do not follow Gray code rules

B. State register width is too small for 3 states

C. Missing reset condition for state register

D. Using blocking assignment instead of non-blocking

Solution

1. Step 1: Check state transitions for Gray code property

   Gray code requires only one bit change between consecutive states. Check transitions: 00->01 (1 bit change), 01->11 (1 bit change), 11->10 (1 bit change), 10->01 (2 bits change).

2. Step 2: Identify violation in transitions

   The transition 10->01 changes two bits, violating Gray code rules.

3. Final Answer:

   State transitions do not follow Gray code rules -> Option A

4. Quick Check:

   Gray code = one bit change per transition [OK]

Hint: Gray code changes only one bit between states [OK]

Common Mistakes:

• Ignoring multi-bit changes in transitions
• Assuming register width is incorrect
• Confusing blocking and non-blocking assignments

5.

You need to design a finite state machine (FSM) with 8 states. Which state encoding method is best to minimize the number of flip-flops used, and why?

hard

A. One-hot encoding, because it uses fewer flip-flops

B. Binary encoding, because it uses the minimum number of flip-flops

C. Gray encoding, because it reduces glitches in output

D. Thermometer encoding, because it is simplest to implement

Solution

1. Step 1: Calculate flip-flops needed for each encoding

   For 8 states, binary encoding needs 3 flip-flops (2^3=8). One-hot encoding needs 8 flip-flops (one per state). Gray encoding also uses binary bits, so 3 flip-flops.

2. Step 2: Choose encoding minimizing flip-flops

   Binary encoding uses the fewest flip-flops (3) compared to one-hot (8). Gray encoding is similar to binary but mainly reduces glitches, not flip-flop count.

3. Final Answer:

   Binary encoding, because it uses the minimum number of flip-flops -> Option B

4. Quick Check:

   Binary encoding = minimum flip-flops for many states [OK]

Hint: Binary encoding uses log2(states) flip-flops [OK]

Common Mistakes:

• Choosing one-hot for fewer flip-flops
• Confusing glitch reduction with flip-flop count
• Assuming thermometer encoding is minimal