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Verilogprogramming~5 mins

When to use blocking (combinational) in Verilog - Time & Space Complexity

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Time Complexity: When to use blocking (combinational)
O(N)
Understanding Time Complexity

We want to understand how the time it takes to run combinational logic with blocking assignments changes as the input size grows.

How does the number of operations grow when using blocking assignments in combinational blocks?

Scenario Under Consideration

Analyze the time complexity of the following combinational logic using blocking assignments.

always @(*) begin
  for (int i = 0; i < N; i = i + 1) begin
    out[i] = in1[i] & in2[i];
  end
end

This code performs a bitwise AND on two input arrays and stores the result in an output array using blocking assignments inside a combinational block.

Identify Repeating Operations

Look for loops or repeated actions that affect execution time.

  • Primary operation: The for-loop that processes each bit of the input arrays.
  • How many times: It runs exactly N times, once for each element.
How Execution Grows With Input

As the input size N grows, the number of operations grows proportionally.

Input Size (N)Approx. Operations
1010 operations
100100 operations
10001000 operations

Pattern observation: The operations increase linearly with input size.

Final Time Complexity

Time Complexity: O(N)

This means the time to complete the combinational logic grows directly in proportion to the input size.

Common Mistake

[X] Wrong: "Using blocking assignments in combinational logic makes execution constant time regardless of input size."

[OK] Correct: Each element still needs to be processed one by one, so time grows with input size.

Interview Connect

Understanding how combinational logic scales helps you design efficient hardware and explain your design choices clearly in interviews.

Self-Check

"What if we replaced the for-loop with nested loops processing a 2D array? How would the time complexity change?"