Moore machine vs Mealy machine in Verilog - Quick Revision & Key Differences

Recall & Review

beginner

What is a Moore machine in digital design?

A Moore machine is a finite state machine where the outputs depend only on the current state, not on the inputs.

beginner

What is a Mealy machine in digital design?

A Mealy machine is a finite state machine where the outputs depend on both the current state and the current inputs.

intermediate

How does output timing differ between Moore and Mealy machines?

In Moore machines, outputs change only on state transitions (clock edges). In Mealy machines, outputs can change immediately when inputs change, even between clock edges.

intermediate

Which machine generally has fewer states: Moore or Mealy?

Mealy machines generally have fewer states because outputs depend on inputs as well, reducing the need for extra states.

advanced

Write a simple Verilog snippet showing output assignment in a Moore machine.

always @(posedge clk or posedge reset) begin if (reset) state <= S0; else state <= next_state; end always @(state) begin case(state) S0: output_signal = 0; S1: output_signal = 1; default: output_signal = 0; endcase end

In a Moore machine, the output depends on:

A Only the current state

B Only the current input

C Current state and input

D Previous state

Moore machine outputs depend only on the current state, not on inputs.

Which machine can change output immediately when input changes?

A Moore machine

B Mealy machine

C Both Moore and Mealy

D Neither

Mealy machine outputs depend on inputs and can change immediately when inputs change.

Which machine usually requires fewer states?

A Depends on clock speed

B Moore machine

C Both require the same

D Mealy machine

Mealy machines often have fewer states because outputs depend on inputs as well.

In Verilog, where is the output assigned in a Moore machine?

A Inside the state transition block

B Outside any always block

C Inside a block sensitive only to state changes

D Inside the input change block

In Moore machines, outputs are assigned based on state, so the block is sensitive to state changes.

Which machine's output is synchronous with the clock?

A Moore machine

B Mealy machine

C Both

D Neither

Moore machine outputs change synchronously with state transitions, which are clocked.

Explain the main difference between Moore and Mealy machines in terms of output dependency.

Think about when outputs can change in each machine.

Describe how you would implement output logic differently in Verilog for a Moore machine versus a Mealy machine.

Consider sensitivity lists and when outputs update.