Practice - 5 Tasks
Answer the questions below
1fill in blank
easyComplete the code to declare a FIFO buffer with a depth of 8.
Verilog
reg [7:0] fifo_mem [0:[1]-1];
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Attempts:
3 left
💡 Hint
Common Mistakes
Using the wrong depth size like 16 or 4.
Forgetting that the index starts at 0.
✗ Incorrect
The FIFO depth is 8, so the memory array should have 8 entries indexed from 0 to 7.
2fill in blank
mediumComplete the code to increment the write pointer in the FIFO.
Verilog
write_ptr <= (write_ptr + 1) % [1];
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Attempts:
3 left
💡 Hint
Common Mistakes
Using a modulo value different from the FIFO depth.
Not wrapping the pointer causing overflow.
✗ Incorrect
The write pointer wraps around after reaching the FIFO depth, which is 8.
3fill in blank
hardFix the error in the FIFO full condition check.
Verilog
fifo_full = ([1] == read_ptr); Drag options to blanks, or click blank then click option'
Attempts:
3 left
💡 Hint
Common Mistakes
Comparing write pointer directly to read pointer without increment.
Using incorrect modulo arithmetic.
✗ Incorrect
The FIFO is full when the next write pointer position equals the read pointer.
4fill in blank
hardFill both blanks to complete the FIFO empty condition check.
Verilog
fifo_empty = ([1] == [2]);
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Attempts:
3 left
💡 Hint
Common Mistakes
Confusing empty with full condition.
Using pointer plus one instead of direct comparison.
✗ Incorrect
The FIFO is empty when the write pointer equals the read pointer.
5fill in blank
hardFill all three blanks to complete the FIFO write operation.
Verilog
if (write_enable && !fifo_full) begin fifo_mem[[1]] <= [2]; [3] <= ([3] + 1) % 8; end
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Attempts:
3 left
💡 Hint
Common Mistakes
Using read pointer instead of write pointer for writing.
Not incrementing the pointer correctly.
✗ Incorrect
Write data to memory at write pointer, then increment write pointer modulo FIFO depth.