Practice - 5 Tasks
Answer the questions below
1fill in blank
easyComplete the code to declare a 2-bit binary state register.
Verilog
reg [[1]:0] state;
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Attempts:
3 left
💡 Hint
Common Mistakes
Using 2 instead of 1 as the most significant bit index.
Forgetting that bit indexing starts at 0.
✗ Incorrect
The state register is 2 bits wide, so the index goes from 1 down to 0.
2fill in blank
mediumComplete the code to assign a one-hot encoded state for state 2.
Verilog
assign one_hot_state = 4'b[1];
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Attempts:
3 left
💡 Hint
Common Mistakes
Setting the wrong bit high for the given state.
Confusing binary index order.
✗ Incorrect
In one-hot encoding, only one bit is high. For state 2, the third bit (index 2) is set: 0100.
3fill in blank
hardFix the error in the Gray code assignment for 3-bit states.
Verilog
assign gray_state = state ^ (state >> [1]); Drag options to blanks, or click blank then click option'
Attempts:
3 left
💡 Hint
Common Mistakes
Using shift amounts other than 1.
Forgetting to use XOR operator.
✗ Incorrect
The Gray code is generated by XORing the state with itself shifted right by 1 bit.
4fill in blank
hardFill both blanks to complete the binary to one-hot conversion.
Verilog
assign one_hot = 1 << [1]; // shift 1 by state index [2]
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Attempts:
3 left
💡 Hint
Common Mistakes
Using a fixed number instead of the state variable for shifting.
Incorrect comment that does not match the code.
✗ Incorrect
To convert binary state to one-hot, shift 1 left by the state value.
5fill in blank
hardFill all three blanks to complete the Gray code to binary conversion.
Verilog
always @(*) begin binary[WIDTH-1] = [1]; for (int i = WIDTH-2; i >= [2]; i = i - 1) begin binary[i] = binary[i+1] ^ [3][i]; end end
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Attempts:
3 left
💡 Hint
Common Mistakes
Initializing binary incorrectly.
Using wrong indices in the loop.
Mixing up Gray and binary variables.
✗ Incorrect
The binary MSB is the Gray MSB. Then each binary bit is XOR of previous binary bit and current Gray bit.