Practice - 5 Tasks
Answer the questions below
1fill in blank
easyComplete the code to perform a left shift by 2 bits on the signal data_in.
VHDL
data_out <= data_in [1] 2;
Drag options to blanks, or click blank then click option'
Attempts:
3 left
💡 Hint
Common Mistakes
Using
srl which shifts bits to the right.Using rotate operators
rol or ror instead of shift.✗ Incorrect
The sll operator shifts bits to the left, filling with zeros on the right.
2fill in blank
mediumComplete the code to perform a right shift by 3 bits on the signal data_in.
VHDL
data_out <= data_in [1] 3;
Drag options to blanks, or click blank then click option'
Attempts:
3 left
💡 Hint
Common Mistakes
Using
sll which shifts bits left.Using rotate operators
rol or ror instead of shift.✗ Incorrect
The srl operator shifts bits to the right, filling with zeros on the left.
3fill in blank
hardFix the error in the code to rotate the signal data_in left by 1 bit.
VHDL
data_out <= data_in [1] 1;
Drag options to blanks, or click blank then click option'
Attempts:
3 left
💡 Hint
Common Mistakes
Using
sll which shifts bits but does not wrap.Using
ror which rotates right instead of left.✗ Incorrect
The rol operator rotates bits to the left, wrapping the leftmost bit to the right end.
4fill in blank
hardFill both blanks to shift data_in right logically by 4 bits and assign to data_out.
VHDL
data_out <= data_in [1] [2];
Drag options to blanks, or click blank then click option'
Attempts:
3 left
💡 Hint
Common Mistakes
Using
sll which shifts left.Using wrong number of bits like
1.✗ Incorrect
Use srl to shift right logically and 4 as the number of bits.
5fill in blank
hardFill both blanks to rotate data_in right by 2 bits and assign to data_out.
VHDL
data_out <= data_in [1] [2];
Drag options to blanks, or click blank then click option'
Attempts:
3 left
💡 Hint
Common Mistakes
Using
srl which shifts but does not rotate.Using wrong number of bits like
3.✗ Incorrect
Use ror to rotate right and 2 as the number of bits.