Shift operators in VHDL - Cheat Sheet & Quick Revision

Recall & Review

beginner

What does the 'sll' operator do in VHDL?

The 'sll' operator shifts bits to the left by a specified number of positions, filling the right with zeros. It stands for 'shift left logical'.

intermediate

Explain the difference between 'srl' and 'sla' in VHDL.

'srl' (shift right logical) shifts bits to the right and fills the left with zeros. 'sla' (shift left arithmetic) shifts bits to the left and preserves the sign bit for signed types.

beginner

What is the result of shifting the binary value "1001" srl 2 in VHDL?

Shifting "1001" srl 2 results in "0010". The bits move right by 2, and zeros fill the left.

intermediate

How does the 'sra' operator behave differently from 'srl'?

'sra' (shift right arithmetic) shifts bits to the right but keeps the leftmost bit (sign bit) unchanged to preserve the number's sign in signed numbers, unlike 'srl' which fills with zeros.

beginner

Can shift operators be used on all VHDL data types?

No, shift operators are mainly used on bit vectors and signed or unsigned types. They do not work on all data types such as reals.

What does the 'sll' operator do in VHDL?

A Shifts bits left and preserves sign bit

B Shifts bits right and fills with zeros

C Shifts bits right and preserves sign bit

D Shifts bits left and fills with zeros

'sll' means shift left logical, which moves bits left and fills the right side with zeros.

Which operator shifts bits right and keeps the sign bit unchanged?

A sra

B srl

C sll

D sla

'sra' is shift right arithmetic, which preserves the sign bit for signed numbers.

If you apply 'srl 3' to the bit vector "11010", what is the result?

A "00001"

B "00011"

C "11000"

D "00010"

Shifting "11010" right by 3 with 'srl' moves bits right 3 places and fills left with zeros, resulting in "00001".

Which shift operator would you use to shift left and preserve the sign bit?

A sll

B sla

C srl

D sra

'sla' is shift left arithmetic, which shifts left and preserves the sign bit.

Can you use shift operators directly on integer types in VHDL?

A Yes, always

B No, never

C Only after converting to bit vectors or unsigned/signed types

D Only with 'sll' operator

Shift operators are defined for bit vectors and unsigned/signed types; for integers, you need to convert them first.

Describe the main shift operators in VHDL and how they differ.

Think about direction and how zeros or sign bits are handled.

Explain when and why you would use an arithmetic shift instead of a logical shift in VHDL.

Consider how negative numbers are represented in binary.

Practice

1. What does the shift_left operator do in VHDL?

easy

A. Inverts all bits in the vector

B. Moves bits to the left, filling with zeros on the right

C. Rotates bits without changing their order

D. Moves bits to the right, filling with zeros on the left

Solution

1. Step 1: Understand the shift_left operator

   The shift_left operator moves all bits in a vector to the left by a specified number of positions.

2. Step 2: Identify what fills the empty positions

   When bits move left, zeros fill the rightmost positions to keep the vector size constant.

3. Final Answer:

   Moves bits to the left, filling with zeros on the right -> Option B

4. Quick Check:

   shift_left = left shift with zero fill [OK]

Hint: Left shift moves bits left, adds zeros on right [OK]

Common Mistakes:

• Confusing shift_left with shift_right
• Thinking bits rotate instead of filling zeros
• Assuming bits are inverted

2. Which of the following is the correct syntax to shift a 8-bit std_logic_vector data 3 bits to the right in VHDL?

easy

A. data <= shift_right(data, 3);

B. data <= shift_left(data, 3);

C. data <= data >> 3;

D. data <= shift(data, -3);

Solution

1. Step 1: Identify the correct shift function for right shift

   In VHDL, shift_right is used to shift bits to the right.

2. Step 2: Check the syntax for shifting

   The syntax is variable <= shift_right(variable, number_of_bits); so data <= shift_right(data, 3); is correct.

3. Final Answer:

   data <= shift_right(data, 3); -> Option A

4. Quick Check:

   shift_right(data, 3) is correct syntax [OK]

Hint: Use shift_right(variable, count) to shift right [OK]

Common Mistakes:

• Using shift_left instead of shift_right
• Using C-style operators like >> which are invalid in VHDL
• Using negative shift counts

3. Given the VHDL code:

signal data : std_logic_vector(7 downto 0) := "00011011";
signal result : std_logic_vector(7 downto 0);

result <= shift_left(data, 2);

What is the value of result after the shift?

medium

A. "01101100"

B. "11011000"

C. "00011000"

D. "01100000"

Solution

1. Step 1: Write the original bits and shift left by 2

   Original data: 00011011
   Shift left by 2 moves bits left 2 places: 01100000 (last two bits become zeros)

2. Step 2: Confirm the shifted bits and zero fill

   Bits shifted left: 0 0 0 1 1 0 1 1
   After shift left 2: 0 1 1 0 0 0 0 0

3. Final Answer:

   "01100000" -> Option D

4. Quick Check:

   shift_left("00011011", 2) = "01100000" [OK]

Hint: Shift left moves bits left, add zeros on right [OK]

Common Mistakes:

• Forgetting to add zeros on right
• Shifting bits right instead of left
• Miscounting bit positions

4. Consider this VHDL snippet:

signal data : std_logic_vector(7 downto 0) := "10101010";
signal result : std_logic_vector(7 downto 0);

result <= shift_right(data, 3);

But the output is unexpected. What is the likely error?

medium

A. Using shift_left instead of shift_right

B. Assigning to signal instead of variable

C. Using shift_right on std_logic_vector without numeric_std library

D. Incorrect bit width of result signal

Solution

1. Step 1: Understand shift_right requirements

   The shift_right function requires the numeric_std library for std_logic_vector operations.

2. Step 2: Identify missing library causing unexpected output

   If numeric_std is not included, shift_right may not work properly on std_logic_vector, causing wrong results.

3. Final Answer:

   Using shift_right on std_logic_vector without numeric_std library -> Option C

4. Quick Check:

   numeric_std needed for shift_right on std_logic_vector [OK]

Hint: Include numeric_std for shift_right on std_logic_vector [OK]

Common Mistakes:

• Forgetting to include numeric_std library
• Confusing shift_left and shift_right
• Assuming signals behave like variables

5. You want to multiply an 8-bit unsigned number num by 8 using shift operators in VHDL. Which expression correctly does this?

hard

A. result <= shift_left(num, 3);

B. result <= shift_right(num, 3);

C. result <= shift_left(num, 2);

D. result <= shift_right(num, 2);

Solution

1. Step 1: Understand multiplication by powers of two

   Multiplying by 8 is the same as multiplying by 2^3, which is shifting left by 3 bits.

2. Step 2: Choose the correct shift operator and count

   Use shift_left(num, 3) to multiply by 8 correctly.

3. Final Answer:

   result <= shift_left(num, 3); -> Option A

4. Quick Check:

   Multiply by 8 = shift_left by 3 [OK]

Hint: Multiply by 2^n with shift_left by n [OK]

Common Mistakes:

• Using shift_right instead of shift_left
• Shifting by wrong number of bits
• Confusing unsigned and signed types