A stimulus process with wait statements helps you test your digital design by applying inputs at specific times.
When you want to test how a circuit reacts to different input signals over time.
When you need to create a simple testbench to check your design without a clock.
When you want to apply inputs step-by-step and observe outputs after each change.
Syntax
VHDL
process
begin
-- apply input signals
wait for time_duration;
-- apply next inputs
wait for time_duration;
-- repeat as needed
wait;
end process;
The wait for statement pauses the process for a set time.
The final wait; stops the process forever, ending the test.
Examples
This process sets signal_a to '0', waits 10 nanoseconds, then sets it to '1', waits another 10 nanoseconds, and stops.
VHDL
process
begin
signal_a <= '0';
wait for10 ns;
signal_a <= '1';
wait for10 ns;
wait;
end process;
This process toggles signal_b with waits in between to simulate input changes over time.
VHDL
process
begin
signal_b <= '1';
wait for5 ns;
signal_b <= '0';
wait for5 ns;
signal_b <= '1';
wait;
end process;
Sample Program
This testbench process sets the reset signal high, waits 20 ns, sets it low, waits 30 ns, sets it high again, then stops. This simulates reset pulses for testing.
VHDL
library ieee;
use ieee.std_logic_1164.all;
entity testbench is
end testbench;
architecture behavior of testbench is
signal clk : std_logic := '0';
signal reset : std_logic := '0';
begin
stimulus_process: process
begin
reset <= '1';
wait for20 ns;
reset <= '0';
wait for30 ns;
reset <= '1';
wait;
end process;
end behavior;
OutputSuccess
Important Notes
Use wait for to control timing precisely in your testbench.
Always end stimulus processes with wait; to avoid infinite loops.
Stimulus processes without clocks are useful for simple input testing.
Summary
Stimulus processes apply inputs step-by-step with timed waits.
wait for pauses the process for a set time.
Use wait; to stop the process after testing.
Practice
(1/5)
1. What is the main purpose of using wait for statements inside a stimulus process in VHDL?
easy
A. To declare variables inside the process
B. To pause the process and apply inputs step-by-step over time
C. To define the clock period for the design
D. To reset all signals to zero immediately
Solution
Step 1: Understand the role of stimulus processes
Stimulus processes apply test inputs to signals during simulation.
Step 2: Identify the function of wait for
The wait for statement pauses the process for a specified time, allowing signals to hold values before changing again.
Final Answer:
To pause the process and apply inputs step-by-step over time -> Option B
Quick Check:
Stimulus process uses wait for to pause and apply inputs [OK]
Hint: Wait statements pause input changes to simulate time steps [OK]
Common Mistakes:
Thinking wait for resets signals
Confusing wait for with variable declaration
Assuming wait for defines clock period
2. Which of the following is the correct way to end a stimulus process in VHDL to stop it from running indefinitely?
easy
A. wait;
B. stop;
C. end process;
D. wait for 10 ns;
Solution
Step 1: Review how stimulus processes terminate
Stimulus processes often run indefinitely unless explicitly stopped.
Step 2: Identify the correct wait statement to stop the process
The statement wait; causes the process to suspend forever, effectively stopping it.
Final Answer:
wait; -> Option A
Quick Check:
Use wait; to stop stimulus process [OK]
Hint: Use plain wait; to stop stimulus process execution [OK]
Common Mistakes:
Using wait for with a time instead of wait;
Trying to use end process; as a stop command
Using stop; which is not valid VHDL
3. Consider the following VHDL stimulus process snippet:
process
begin
signal_a <= '0';
wait for 10 ns;
signal_a <= '1';
wait for 20 ns;
wait;
end process;
What is the value of signal_a at 25 ns after simulation start?
medium
A. '0'
B. Undefined
C. '1'
D. Signal does not change
Solution
Step 1: Trace signal assignments over time
At 0 ns, signal_a is set to '0'. After 10 ns, it changes to '1'.
Step 2: Determine signal value at 25 ns
At 25 ns, which is after the 10 ns and before the 30 ns (10+20), signal_a remains '1'.
Final Answer:
'1' -> Option C
Quick Check:
Signal changes at 10 ns to '1', stays until 30 ns [OK]
Hint: Add wait times cumulatively to find signal value at given time [OK]
Common Mistakes:
Assuming signal_a is still '0' at 25 ns
Ignoring the second wait for 20 ns
Confusing wait; with wait for
4. Identify the error in the following stimulus process code:
process
begin
signal_b <= '1';
wait for 5 ns
signal_b <= '0';
wait for 5 ns;
wait;
end process;
medium
A. Missing semicolon after first wait for statement
B. Signal assignment syntax is incorrect
C. wait; statement is misplaced
D. Process missing sensitivity list
Solution
Step 1: Check syntax of wait statements
The first wait for 5 ns is missing a semicolon at the end.
Step 2: Confirm other syntax elements
Signal assignments and the final wait; are correct. Sensitivity list is not required in a process with wait statements.
Final Answer:
Missing semicolon after first wait for statement -> Option A
Quick Check:
Every wait for must end with semicolon [OK]
Hint: Check semicolons after wait for statements carefully [OK]
Common Mistakes:
Thinking sensitivity list is required with wait
Misreading signal assignment syntax
Assuming wait; must be last line only
5. You want to create a stimulus process that toggles clk every 15 ns and stops after 90 ns. Which code snippet correctly implements this behavior?
hard
A. process
begin
clk <= '0';
wait for 15 ns;
clk <= '1';
wait for 15 ns;
wait;
end process;
B. process
begin
clk <= '0';
wait for 90 ns;
clk <= '1';
wait;
end process;
C. process
begin
for i in 0 to 5 loop
clk <= '0';
wait for 15 ns;
clk <= '1';
wait for 15 ns;
end loop;
wait;
end process;
D. process
variable count : integer := 0;
begin
while count < 6 loop
clk <= not clk;
wait for 15 ns;
count := count + 1;
end loop;
wait;
end process;
Solution
Step 1: Understand toggling every 15 ns for 90 ns
Toggling means changing clk from 0 to 1 or 1 to 0 every 15 ns. For 90 ns total, toggling happens 6 times (90/15).
Step 2: Analyze each option's logic
process
variable count : integer := 0;
begin
while count < 6 loop
clk <= not clk;
wait for 15 ns;
count := count + 1;
end loop;
wait;
end process; uses a loop with a counter to toggle clk 6 times, waiting 15 ns each time, then stops with wait;. Others either toggle once or use incorrect timing.
Final Answer:
variable count : integer := 0; while count < 6 loop clk <= not clk; wait for 15 ns; count := count + 1; end loop; wait; -> Option D
Quick Check:
Loop with wait for 15 ns toggles clk 6 times [OK]
Hint: Use loop with counter and wait for to toggle signals repeatedly [OK]
Common Mistakes:
Using single wait for without loop for repeated toggling
Incorrect loop ranges causing wrong toggle count
Not stopping process after toggling
Recommended
Ready to prove it?
Pass the test and this pattern moves unknownstrongwhile earning +1 Grip toward your certificate.