Shift operators in VHDL - Mini Project: Build & Apply

Shift Operators in VHDL

📖 Scenario: You are designing a simple digital circuit that needs to shift bits in a 4-bit input signal. This is common in hardware design for tasks like multiplying or dividing by powers of two.

🎯 Goal: Build a VHDL program that uses shift operators to shift a 4-bit input signal left and right by one position.

📋 What You'll Learn

Create a 4-bit std_logic_vector signal called input_signal with the value "1010"

Create an integer constant called shift_amount with the value 1

Use the shift left operator sll to shift input_signal left by shift_amount and store it in shifted_left

Use the shift right operator srl to shift input_signal right by shift_amount and store it in shifted_right

Print the values of shifted_left and shifted_right using report statements

💡 Why This Matters

🌍 Real World

Shift operators are used in digital circuits for tasks like multiplying or dividing numbers by powers of two, bit manipulation, and data encoding.

💼 Career

Understanding shift operators is essential for hardware engineers and FPGA designers working with VHDL to create efficient digital logic.

1

DATA SETUP: Create the 4-bit input signal

Create a 4-bit std_logic_vector signal called input_signal and set it to "1010".

VHDL

-- Create a 4-bit std_logic_vector signal called input_signal and set it to "1010"
-- Your code here

Hint

Use signal input_signal : std_logic_vector(3 downto 0) := "1010"; inside the architecture.

2

CONFIGURATION: Define the shift amount

Create an integer constant called shift_amount and set it to 1 inside the architecture.

VHDL

library ieee;
use ieee.std_logic_1164.all;

entity shift_example is
end shift_example;

architecture behavior of shift_example is
    signal input_signal : std_logic_vector(3 downto 0) := "1010";
    -- Create an integer constant called shift_amount and set it to 1
    -- Your code here
begin
end behavior;

Hint

Use constant shift_amount : integer := 1; inside the architecture.

3

CORE LOGIC: Apply shift operators

Create two signals called shifted_left and shifted_right of type std_logic_vector(3 downto 0). Assign shifted_left to input_signal sll shift_amount and shifted_right to input_signal srl shift_amount inside the architecture.

VHDL

library ieee;
use ieee.std_logic_1164.all;

entity shift_example is
end shift_example;

architecture behavior of shift_example is
    signal input_signal : std_logic_vector(3 downto 0) := "1010";
    constant shift_amount : integer := 1;
    -- Create signals shifted_left and shifted_right and assign shifted values
    -- Your code here
begin
end behavior;

Hint

Declare shifted_left and shifted_right as signals and assign them using sll and srl operators.

4

OUTPUT: Display the shifted signals

Add report statements inside the architecture to print the values of shifted_left and shifted_right as strings.

VHDL

library ieee;
use ieee.std_logic_1164.all;

entity shift_example is
end shift_example;

architecture behavior of shift_example is
    signal input_signal : std_logic_vector(3 downto 0) := "1010";
    constant shift_amount : integer := 1;
    signal shifted_left : std_logic_vector(3 downto 0);
    signal shifted_right : std_logic_vector(3 downto 0);
begin
    shifted_left <= input_signal sll shift_amount;
    shifted_right <= input_signal srl shift_amount;
    -- Add report statements to print shifted_left and shifted_right
    -- Your code here
end behavior;

Hint

Use a process to report the values of shifted_left and shifted_right using report and std_logic_vector'image.

Practice

1. What does the shift_left operator do in VHDL?

easy

A. Inverts all bits in the vector

B. Moves bits to the left, filling with zeros on the right

C. Rotates bits without changing their order

D. Moves bits to the right, filling with zeros on the left

Solution

1. Step 1: Understand the shift_left operator

   The shift_left operator moves all bits in a vector to the left by a specified number of positions.

2. Step 2: Identify what fills the empty positions

   When bits move left, zeros fill the rightmost positions to keep the vector size constant.

3. Final Answer:

   Moves bits to the left, filling with zeros on the right -> Option B

4. Quick Check:

   shift_left = left shift with zero fill [OK]

Hint: Left shift moves bits left, adds zeros on right [OK]

Common Mistakes:

• Confusing shift_left with shift_right
• Thinking bits rotate instead of filling zeros
• Assuming bits are inverted

2. Which of the following is the correct syntax to shift a 8-bit std_logic_vector data 3 bits to the right in VHDL?

easy

A. data <= shift_right(data, 3);

B. data <= shift_left(data, 3);

C. data <= data >> 3;

D. data <= shift(data, -3);

Solution

1. Step 1: Identify the correct shift function for right shift

   In VHDL, shift_right is used to shift bits to the right.

2. Step 2: Check the syntax for shifting

   The syntax is variable <= shift_right(variable, number_of_bits); so data <= shift_right(data, 3); is correct.

3. Final Answer:

   data <= shift_right(data, 3); -> Option A

4. Quick Check:

   shift_right(data, 3) is correct syntax [OK]

Hint: Use shift_right(variable, count) to shift right [OK]

Common Mistakes:

• Using shift_left instead of shift_right
• Using C-style operators like >> which are invalid in VHDL
• Using negative shift counts

3. Given the VHDL code:

signal data : std_logic_vector(7 downto 0) := "00011011";
signal result : std_logic_vector(7 downto 0);

result <= shift_left(data, 2);

What is the value of result after the shift?

medium

A. "01101100"

B. "11011000"

C. "00011000"

D. "01100000"

Solution

1. Step 1: Write the original bits and shift left by 2

   Original data: 00011011
   Shift left by 2 moves bits left 2 places: 01100000 (last two bits become zeros)

2. Step 2: Confirm the shifted bits and zero fill

   Bits shifted left: 0 0 0 1 1 0 1 1
   After shift left 2: 0 1 1 0 0 0 0 0

3. Final Answer:

   "01100000" -> Option D

4. Quick Check:

   shift_left("00011011", 2) = "01100000" [OK]

Hint: Shift left moves bits left, add zeros on right [OK]

Common Mistakes:

• Forgetting to add zeros on right
• Shifting bits right instead of left
• Miscounting bit positions

4. Consider this VHDL snippet:

signal data : std_logic_vector(7 downto 0) := "10101010";
signal result : std_logic_vector(7 downto 0);

result <= shift_right(data, 3);

But the output is unexpected. What is the likely error?

medium

A. Using shift_left instead of shift_right

B. Assigning to signal instead of variable

C. Using shift_right on std_logic_vector without numeric_std library

D. Incorrect bit width of result signal

Solution

1. Step 1: Understand shift_right requirements

   The shift_right function requires the numeric_std library for std_logic_vector operations.

2. Step 2: Identify missing library causing unexpected output

   If numeric_std is not included, shift_right may not work properly on std_logic_vector, causing wrong results.

3. Final Answer:

   Using shift_right on std_logic_vector without numeric_std library -> Option C

4. Quick Check:

   numeric_std needed for shift_right on std_logic_vector [OK]

Hint: Include numeric_std for shift_right on std_logic_vector [OK]

Common Mistakes:

• Forgetting to include numeric_std library
• Confusing shift_left and shift_right
• Assuming signals behave like variables

5. You want to multiply an 8-bit unsigned number num by 8 using shift operators in VHDL. Which expression correctly does this?

hard

A. result <= shift_left(num, 3);

B. result <= shift_right(num, 3);

C. result <= shift_left(num, 2);

D. result <= shift_right(num, 2);

Solution

1. Step 1: Understand multiplication by powers of two

   Multiplying by 8 is the same as multiplying by 2^3, which is shifting left by 3 bits.

2. Step 2: Choose the correct shift operator and count

   Use shift_left(num, 3) to multiply by 8 correctly.

3. Final Answer:

   result <= shift_left(num, 3); -> Option A

4. Quick Check:

   Multiply by 8 = shift_left by 3 [OK]

Hint: Multiply by 2^n with shift_left by n [OK]

Common Mistakes:

• Using shift_right instead of shift_left
• Shifting by wrong number of bits
• Confusing unsigned and signed types