Why Stimulus process with wait statements in VHDL? - Purpose & Use Cases

The Big Idea

What if you could write test code that naturally pauses like real time, without complicated counting?

The Scenario

Imagine you want to test a digital circuit by changing inputs one by one at exact times. You try to write code that sets inputs, then waits, then sets new inputs, all by manually counting clock cycles or using complex loops.

The Problem

This manual way is slow and confusing. You might lose track of timing, make mistakes in delays, or write very long code that is hard to read and fix. It's like trying to keep track of many timers in your head at once.

The Solution

Using a stimulus process with wait statements lets you write clear, simple code that pauses exactly where you want. You can set inputs, then say "wait for 10 ns", then set new inputs, and so on. This makes your test easy to understand and maintain.

Before vs After

✗ Before

signal <= '1'; -- manually count cycles
-- complex loops for delay
signal <= '0';

✓ After

signal <= '1';
wait for 10 ns;
signal <= '0';
wait for 5 ns;

What It Enables

This approach makes writing timed test sequences straightforward, reliable, and easy to follow, so you can focus on testing your design, not managing delays.

Real Life Example

When testing a traffic light controller, you can easily simulate pressing a button, waiting a few seconds, then releasing it, all with clear wait statements in your stimulus process.

Key Takeaways

Manual timing is error-prone and hard to read.

Wait statements let you pause exactly where needed.

Stimulus processes become clear and easy to maintain.