Decoder and encoder design in VHDL - Step-by-Step Execution

Concept Flow - Decoder and encoder design

Input bits

↓

Decoder: 2^n outputs

↓

One output active

↓

Input lines

↓

Encoder: n outputs

↓

Binary code output

A decoder takes n input bits and activates one of 2^n outputs. An encoder does the opposite: it takes one active input line and outputs the corresponding binary code.

Execution Sample

VHDL

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity Decoder2to4 is
  Port ( A : in STD_LOGIC_VECTOR(1 downto 0);
         Y : out STD_LOGIC_VECTOR(3 downto 0));
end Decoder2to4;

This VHDL code defines a 2-to-4 line decoder entity with 2 input bits and 4 output lines.

Execution Table

Step	Input A(1 downto 0)	Decoder Output Y(3 downto 0)	Explanation
1	"00"	"0001"	Input 00 activates output Y0 only
2	"01"	"0010"	Input 01 activates output Y1 only
3	"10"	"0100"	Input 10 activates output Y2 only
4	"11"	"1000"	Input 11 activates output Y3 only
5	Any other	"0000"	No output active (default)

💡 All possible 2-bit inputs covered; decoder outputs one active line per input.

Variable Tracker

Variable	Start	After Step 1	After Step 2	After Step 3	After Step 4	Final
A	"00"	"00"	"01"	"10"	"11"	"11"
Y	"0000"	"0001"	"0010"	"0100"	"1000"	"1000"

Key Moments - 3 Insights

Why does only one output line go high for each input in the decoder?

Because the decoder activates exactly one output line corresponding to the binary input, as shown in execution_table rows 1-4.

What happens if the input to the decoder is invalid or not covered?

The decoder outputs all zeros (no active output), as shown in execution_table row 5.

How does the encoder know which input line is active?

The encoder detects the single active input line and outputs its binary code, the reverse of the decoder process.

Visual Quiz - 3 Questions

Look at the execution_table, what is the decoder output Y when input A is "10"?

A "0100"

B "0010"

C "1000"

D "0001"

💡 Hint

Check execution_table row 3 for input "10" and output Y.

At which step does the decoder output activate the third output line?

A Step 1

B Step 2

C Step 3

D Step 4

💡 Hint

Look at execution_table outputs and match the active bit position.

If the input A changes from "01" to "11", how does the output Y change?

A From "0001" to "0100"

B From "0010" to "1000"

C From "0100" to "0010"

D No change

💡 Hint

Compare execution_table rows 2 and 4 for inputs "01" and "11".

Concept Snapshot

Decoder:
- Input: n bits
- Output: 2^n lines
- Only one output active per input

Encoder:
- Input: one active line
- Output: n bits
- Outputs binary code of active input

Used for data routing and signal conversion.

Full Transcript

This visual execution shows how a 2-to-4 line decoder works in VHDL. The decoder takes 2 input bits and activates exactly one of 4 output lines. Each input combination corresponds to one output line going high. The variable tracker shows how inputs and outputs change step by step. Key moments clarify why only one output is active and what happens with invalid inputs. The quiz tests understanding of output values and transitions. The snapshot summarizes decoder and encoder roles in digital design.