Priority encoder in VHDL - Step-by-Step Execution

Concept Flow - Priority encoder

Input bits

↓

Check highest priority bit

Yes↓

Output index of that bit

No↓

Check next bit

No↓

Output default (e.g., zero)

The priority encoder checks input bits from highest to lowest priority and outputs the index of the first bit set to 1.

Execution Sample

VHDL

library ieee;
use ieee.std_logic_1164.all;

entity priority_encoder is
  port(input : in std_logic_vector(3 downto 0);
       output : out std_logic_vector(1 downto 0));
end entity;

architecture behavior of priority_encoder is
begin
  process(input) is
  begin
    if input(3) = '1' then
      output <= "11";
    elsif input(2) = '1' then
      output <= "10";
    elsif input(1) = '1' then
      output <= "01";
    elsif input(0) = '1' then
      output <= "00";
    else
      output <= "00"; -- default
    end if;
  end process;
end behavior;

This VHDL code implements a 4-bit priority encoder that outputs the index of the highest priority input bit set to 1.

Execution Table

Step	Input bits	Check bit	Condition	Output assigned	Reason
1	input = "0101"	input(3)	'0' = '1'? No	None	Highest bit not set
2	input = "0101"	input(2)	'1' = '1'? Yes	output <= "10"	Second highest bit set
3	input = "0101"	Stop checking	-	Output fixed at "10"	Priority found, stop
4	input = "0000"	input(3)	'0' = '1'? No	None	No bits set
5	input = "0000"	input(2)	'0' = '1'? No	None	No bits set
6	input = "0000"	input(1)	'0' = '1'? No	None	No bits set
7	input = "0000"	input(0)	'0' = '1'? No	output <= "00"	Default output
8	input = "1000"	input(3)	'1' = '1'? Yes	output <= "11"	Highest bit set
9	input = "1000"	Stop checking	-	Output fixed at "11"	Priority found, stop

💡 Stops checking once highest priority '1' bit is found or outputs default if none set.

Variable Tracker

Variable	Start	After Step 1	After Step 2	After Step 3	After Step 7	After Step 8	Final
input	"0101"	"0101"	"0101"	"0101"	"0000"	"1000"	"1000"
output	"00"	"00"	"10"	"10"	"00"	"00"	"11"

Key Moments - 3 Insights

Why does the encoder stop checking bits after finding the first '1'?

Because the priority encoder outputs the index of the highest priority bit set to '1' and ignores lower bits, as shown in execution_table rows 2-3 and 8-9.

What happens if no input bits are set to '1'?

The encoder outputs a default value ("00"), as shown in execution_table rows 4-7, ensuring a defined output even when no bits are active.

Why is the output "10" when input is "0101"?

Because input(2) is the highest priority bit set to '1' in "0101", so output is set to binary 2 ("10"), as shown in execution_table row 2.

Visual Quiz - 3 Questions

Look at the execution table, what is the output after step 2 when input is "0101"?

A "11"

B "01"

C "10"

D "00"

💡 Hint

Check the 'Output assigned' column at step 2 in the execution_table.

At which step does the encoder output the default value "00"?

A Step 3

B Step 7

C Step 9

D Step 1

💡 Hint

Look for the step where no bits are set and output is assigned default in execution_table.

If input changes to "1001", what would be the output according to the priority encoder logic?

A "11"

B "00"

C "01"

D "10"

💡 Hint

Highest priority bit set is input(3), output is binary 3 ("11"), see similar case in step 8.

Concept Snapshot

Priority encoder checks input bits from highest to lowest.
Outputs binary index of first '1' bit found.
Stops checking after first '1'.
Outputs default if no bits set.
Common in hardware to reduce signals.

Full Transcript

A priority encoder in VHDL checks input bits starting from the highest priority bit down to the lowest. It outputs the binary index of the first bit set to '1'. If no bits are set, it outputs a default value, usually zero. The process stops checking bits once it finds the highest priority '1' bit. This behavior is shown in the execution table where inputs like "0101" result in output "10" because the second highest bit is set. When input is all zeros, the output defaults to "00". This logic helps hardware circuits decide which input has priority quickly.

Practice

1.

What is the main function of a priority encoder in VHDL?

easy

A. It adds two binary numbers together.

B. It stores data temporarily.

C. It outputs the binary code of the highest priority active input.

D. It converts analog signals to digital.

Solution

1. Step 1: Understand the role of a priority encoder

   A priority encoder checks multiple inputs and finds the one with the highest priority that is active (usually '1').

2. Step 2: Identify the output behavior

   It outputs the binary code representing the position of that highest priority active input.

3. Final Answer:

   It outputs the binary code of the highest priority active input. -> Option C

4. Quick Check:

   Priority encoder = highest priority input code [OK]

Hint: Remember: priority encoder picks highest active input [OK]

Common Mistakes:

• Confusing priority encoder with adder
• Thinking it stores data like a register
• Mixing it up with analog-to-digital converter

2.

Which of the following is the correct VHDL syntax to declare a 4-to-2 priority encoder entity?

entity PriorityEncoder is
  Port (
    inputs : in std_logic_vector(3 downto 0);
    output : out std_logic_vector(1 downto 0)
  );
end PriorityEncoder;

easy

A. entity PriorityEncoder is
Port (
inputs : in std_logic_vector(3 downto 0);
output : out std_logic_vector(2 downto 0)
);
end PriorityEncoder;

B. entity PriorityEncoder is
Port (
inputs : in std_logic_vector(3 downto 0);
output : out std_logic_vector(1 downto 0)
);
end PriorityEncoder;

C. entity PriorityEncoder is
Port (
inputs : in std_logic_vector(0 to 3);
output : out std_logic_vector(1 downto 0)
);
end PriorityEncoder;

D. entity PriorityEncoder is
Port (
inputs : out std_logic_vector(3 downto 0);
output : in std_logic_vector(1 downto 0)
);
end PriorityEncoder;

Solution

1. Step 1: Check input and output directions

   Inputs should be in and outputs should be out. entity PriorityEncoder is Port ( inputs : in std_logic_vector(3 downto 0); output : out std_logic_vector(1 downto 0) ); end PriorityEncoder; correctly declares inputs as in and output as out.

2. Step 2: Verify vector ranges

   Inputs are 4 bits (3 downto 0) and output is 2 bits (1 downto 0), matching a 4-to-2 encoder. entity PriorityEncoder is Port ( inputs : in std_logic_vector(3 downto 0); output : out std_logic_vector(1 downto 0) ); end PriorityEncoder; matches this exactly.

3. Final Answer:

   Correct entity declaration with inputs as in and outputs as out, proper vector ranges. -> Option B

4. Quick Check:

   Input in, output out, correct vector sizes [OK]

Hint: Inputs are 'in', outputs are 'out' with correct vector sizes [OK]

Common Mistakes:

• Swapping input and output directions
• Using wrong vector ranges (e.g., 0 to 3 instead of 3 downto 0)
• Declaring output vector size incorrectly

3.

Given the following VHDL process for a 4-to-2 priority encoder, what will be the output when inputs = "0101"?

process(inputs)
begin
  case inputs is
    when "1000" => output <= "11";
    when "0100" => output <= "10";
    when "0010" => output <= "01";
    when "0001" => output <= "00";
    when others => output <= "00";
  end case;
end process;

medium

A. "00"

B. "11"

C. "01"

D. "10"

Solution

1. Step 1: Analyze the input pattern

   The input is "0101", which means bits 3 and 1 are active (bit 3 is MSB). The process checks exact matches only.

2. Step 2: Check case matches

   The case matches only exact inputs: "1000", "0100", "0010", "0001". "0101" does not match any, so it falls to when others.

3. Final Answer:

   Output is "00" from the when others clause. -> Option A

4. Quick Check:

   No exact match input = output "00" [OK]

Hint: Case matches exact inputs; else outputs default [OK]

Common Mistakes:

• Assuming partial matches trigger output
• Ignoring the when others clause
• Misreading input bit order

4.

Identify the error in this VHDL priority encoder process snippet:

process(inputs)
begin
  if inputs(0) = '1' then
    output <= "00";
  elsif inputs(1) = '1' then
    output <= "01";
  elsif inputs(2) = '1' then
    output <= "10";
  elsif inputs(3) = '1' then
    output <= "11";
  end if;
end process;

medium

A. The priority order is reversed; highest priority should be inputs(3).

B. The output vector size is incorrect.

C. The process is missing a sensitivity list.

D. The if-elsif structure should use case statement instead.

Solution

1. Step 1: Check priority order in conditions

   The process checks inputs starting from inputs(0) to inputs(3). This means input 0 has highest priority, which is usually incorrect for priority encoders.

2. Step 2: Understand typical priority encoder behavior

   Priority encoders usually assign highest priority to the highest index input (inputs(3) here). So the order should start checking inputs(3) first.

3. Final Answer:

   Priority order is reversed; highest priority should be inputs(3). -> Option A

4. Quick Check:

   Highest input bit checked first for priority [OK]

Hint: Check priority order: highest input bit first [OK]

Common Mistakes:

• Checking lowest bit first as highest priority
• Forgetting to include all inputs in conditions
• Confusing sensitivity list with process body

5.

You want to design a 8-to-3 priority encoder in VHDL that outputs the binary position of the highest priority input bit set to '1'. Which approach correctly implements this behavior?

process(inputs)
begin
  output <= "000";
  if inputs(7) = '1' then
    output <= "111";
  elsif inputs(6) = '1' then
    output <= "110";
  elsif inputs(5) = '1' then
    output <= "101";
  elsif inputs(4) = '1' then
    output <= "100";
  elsif inputs(3) = '1' then
    output <= "011";
  elsif inputs(2) = '1' then
    output <= "010";
  elsif inputs(1) = '1' then
    output <= "001";
  elsif inputs(0) = '1' then
    output <= "000";
  end if;
end process;

hard

A. This approach is incorrect; output should be assigned only once outside the process.

B. This approach is incorrect; it should use a case statement instead of if-elsif.

C. This approach is incorrect; inputs should be checked from lowest to highest.

D. This approach is correct; it checks inputs from highest to lowest and assigns output accordingly.

Solution

1. Step 1: Verify priority checking order

   The process checks inputs starting from inputs(7) down to inputs(0), which is correct for highest priority first.

2. Step 2: Confirm output assignment matches input position

   Output is assigned the binary code of the input bit position, matching the highest active input.

3. Step 3: Check default output assignment

   Output is initialized to "000" before checks, so if no inputs are active, output remains zero.

4. Final Answer:

   This approach is correct; it checks inputs from highest to lowest and assigns output accordingly. -> Option D

5. Quick Check:

   Highest to lowest check with matching output [OK]

Hint: Check inputs highest to lowest, assign output immediately [OK]

Common Mistakes:

• Checking inputs in wrong order
• Assigning output multiple times incorrectly
• Using case instead of if-elsif is optional, not required