Procedure declaration and usage in VHDL - Practice Problems & Coding Challenges

Challenge - 5 Problems

❓ Predict Output

intermediate

What is the output of this VHDL procedure call?

Consider the following VHDL code snippet. What value will be assigned to result after the procedure call?

VHDL

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

entity test_proc is
end entity;

architecture behavior of test_proc is
  signal result : integer := 0;
  procedure add_five(signal val : inout integer) is
  begin
    val <= val + 5;
  end procedure;
begin
  process
  begin
    result <= 10;
    wait for 10 ns;
    add_five(result);
    wait;
  end process;
end architecture;

A result = 15

B result = 10

C result = 5

D Compilation error due to procedure call

💡 Hint

Remember that inout parameters allow the procedure to modify the argument.

The procedure add_five adds 5 to the input integer. Since result starts at 10, after the call it becomes 15.

❓ Predict Output

intermediate

What error occurs when calling a procedure with wrong parameter mode?

Given the procedure below, what happens if you call it with a signal passed as in parameter but try to modify it inside?

VHDL

procedure increment(val : in integer) is
begin
  val := val + 1;
end procedure;

A Runtime error: signal assignment failure

B Compilation error: cannot assign to an 'in' parameter

C No error, val is incremented

D Warning but code compiles

💡 Hint

Check the rules for modifying in parameters inside procedures.

Parameters declared as in are read-only inside procedures. Assigning to them causes a compilation error.

🔧 Debug

advanced

Why does this procedure not update the signal as expected?

Examine the code below. The procedure is supposed to double the input signal value, but the signal remains unchanged after the call. Why?

VHDL

procedure double_val(val : in integer) is
begin
  val := val * 2;
end procedure;

signal my_val : integer := 3;

begin
  double_val(my_val);
  -- my_val remains 3

A Because the procedure is missing a wait statement

B Because signals cannot be passed to procedures

C Because the parameter mode is 'in', so val is a copy and changes do not affect my_val

D Because the procedure must return a value explicitly

💡 Hint

Think about how 'in' parameters behave inside procedures.

Parameters declared as 'in' are passed by value (copy). Modifying them inside the procedure does not change the original signal.

📝 Syntax

advanced

Identify the syntax error in this procedure declaration

Which option shows the correct syntax for declaring a procedure with an out parameter in VHDL?

A

procedure set_value(out val : integer) is
begin
  val := 10;
end procedure;

B

procedure set_value(val out : integer) is
begin
  val := 10;
end procedure;

C

procedure set_value(val : integer out) is
begin
  val := 10;
end procedure;

D

procedure set_value(val : out integer) is
begin
  val := 10;
end procedure;

💡 Hint

Parameter mode comes after the parameter name, separated by a colon.

In VHDL, the correct syntax is param_name : mode type. So val : out integer is correct.

🚀 Application

expert

How many times is the procedure called and what is the final value?

Given the following VHDL code, how many times is the procedure increment called and what is the final value of counter?

VHDL

signal counter : integer := 0;

procedure increment(signal val : inout integer) is
begin
  val <= val + 1;
end procedure;

begin
  increment(counter);
  increment(counter);
  increment(counter);
  -- What is counter now?

A 3 times called, counter = 3

B 3 times called, counter = 0

C 1 time called, counter = 1

D Compilation error due to signal parameter

💡 Hint

Each call adds 1 to counter, which starts at 0.

The procedure is called three times, each time increasing counter by 1. So final value is 3.

Practice

1. What is the main purpose of a procedure in VHDL?

easy

A. To group a set of instructions for reuse

B. To declare a new signal

C. To define a new entity

D. To assign values to constants

Solution

1. Step 1: Understand what a procedure does

   A procedure groups instructions to perform a specific task that can be reused multiple times in the code.

2. Step 2: Compare with other options

   Declaring signals, entities, or assigning constants are different VHDL tasks, not the main purpose of procedures.

3. Final Answer:

   To group a set of instructions for reuse -> Option A

4. Quick Check:

   Procedure = reusable instruction group [OK]

Hint: Procedures bundle instructions for reuse [OK]

Common Mistakes:

• Confusing procedures with signal declarations
• Thinking procedures define entities
• Assuming procedures assign constants

2. Which of the following is the correct way to declare a procedure in VHDL?

easy

A. procedure my_proc() begin
-- code
end procedure;

B. procedure my_proc is
begin
-- code
end procedure;

C. procedure my_proc is
-- code
end;

D. procedure my_proc is
begin
-- code
end;

Solution

1. Step 1: Recall VHDL procedure syntax

   A procedure declaration uses the syntax: procedure name is begin ... end procedure;.

2. Step 2: Check each option

   procedure my_proc is begin -- code end procedure; matches the correct syntax with is, begin, and end procedure;. Options B, C, and D have syntax errors or missing keywords.

3. Final Answer:

   procedure my_proc is begin -- code end procedure; -> Option B

4. Quick Check:

   Procedure syntax = procedure my_proc is begin -- code end procedure; [OK]

Hint: Procedure ends with 'end procedure;' [OK]

Common Mistakes:

• Omitting 'procedure' keyword at the end
• Using parentheses after procedure name
• Ending with just 'end;' instead of 'end procedure;'

3. What will be the output of the following VHDL procedure call?

procedure add_one(signal x : inout integer) is
begin
  x <= x + 1;
end procedure;

signal val : integer := 5;
begin
  add_one(val);
  -- What is val now?
end;

medium

A. 5

B. 7

C. 6

D. Error: procedure call syntax

Solution

1. Step 1: Understand procedure behavior

   The procedure add_one takes a signal x as inout and increments it by 1.

2. Step 2: Apply procedure to signal val

   Initially, val is 5. After calling add_one(val);, val becomes 5 + 1 = 6.

3. Final Answer:

   6 -> Option C

4. Quick Check:

   5 + 1 = 6 [OK]

Hint: Inout parameter changes value inside procedure [OK]

Common Mistakes:

• Assuming input parameters cannot change
• Confusing procedure call syntax
• Forgetting procedure modifies signal

4. Identify the error in this procedure declaration:

procedure multiply_by_two(x : in integer; y : out integer) is
begin
  y := x * 2;
end;

medium

A. Procedure must end with 'end procedure;' not just 'end;'

B. Procedure body cannot assign values to 'out' parameters

C. Parameters cannot have modes like 'in' or 'out'

D. Missing 'procedure' keyword before 'multiply_by_two'

Solution

1. Step 1: Check procedure ending syntax

   In VHDL, a procedure must end with end procedure; not just end;.

2. Step 2: Verify other parts

   The procedure keyword is present, parameter modes are allowed, and assigning to 'out' parameters is valid.

3. Final Answer:

   Procedure must end with 'end procedure;' not just 'end;' -> Option A

4. Quick Check:

   Procedure ends with 'end procedure;' [OK]

Hint: Procedure must end with 'end procedure;' [OK]

Common Mistakes:

• Ending procedure with just 'end;'
• Thinking parameter modes are not allowed
• Confusing procedure and function endings

5. You want to create a procedure that swaps two integer signals a and b. Which of the following is the correct procedure declaration and usage?

hard

A. procedure swap(signal x, y : in integer) is
variable temp : integer;
begin
temp := x;
x := y;
y := temp;
end procedure;

-- Usage: swap(a, b);

B. procedure swap(signal x, y : out integer) is
variable temp : integer;
begin
temp := x;
x := y;
y := temp;
end procedure;

-- Usage: swap(a, b);

C. procedure swap(x, y : integer) is
variable temp : integer;
begin
temp := x;
x := y;
y := temp;
end procedure;

-- Usage: swap(a, b);

D. procedure swap(signal x, y : inout integer) is
variable temp : integer;
begin
temp := x;
x <= y;
y <= temp;
end procedure;

-- Usage: swap(a, b);

Solution

1. Step 1: Determine correct parameter modes for swapping

   To swap values, both parameters must be inout or signal with mode allowing read and write. 'inout' is correct.

2. Step 2: Check procedure declaration and usage

   procedure swap(signal x, y : inout integer) is variable temp : integer; begin temp := x; x <= y; y <= temp; end procedure; -- Usage: swap(a, b); declares parameters as signal x, y : inout integer and uses a temporary variable to swap values correctly. Usage is correct.

3. Final Answer:

   procedure swap(signal x, y : inout integer) is variable temp : integer; begin temp := x; x <= y; y <= temp; end procedure; -- Usage: swap(a, b); -> Option D

4. Quick Check:

   Swap needs inout parameters [OK]

Hint: Use 'inout' mode to modify both parameters [OK]

Common Mistakes:

• Using 'in' mode which is read-only
• Using 'out' mode which cannot read input
• Omitting 'signal' keyword for signals