Bitwise operators (AND, OR, XOR, NOT) in Verilog - Interactive Code Practice

Practice - 5 Tasks

1fill in blank

easy

Complete the code to perform a bitwise AND between a and b.

Verilog

assign result = a [1] b;

Drag options to blanks, or click blank then click option'

A|

B&

C^

D~

Attempts:

3 left

💡 Hint

Common Mistakes

Using the OR operator | instead of AND.

Using the XOR operator ^ which behaves differently.

The bitwise AND operator in Verilog is &. It compares each bit of a and b and returns 1 only if both bits are 1.

2fill in blank

medium

Complete the code to perform a bitwise OR between x and y.

Verilog

assign out = x [1] y;

Drag options to blanks, or click blank then click option'

A~

B^

C&

D|

Attempts:

3 left

💡 Hint

Common Mistakes

Using AND & instead of OR.

Using NOT ~ which inverts bits.

The bitwise OR operator in Verilog is |. It returns 1 if at least one of the bits is 1.

3fill in blank

hard

Fix the error in the code to perform a bitwise XOR between p and q.

Verilog

assign res = p [1] q;

Drag options to blanks, or click blank then click option'

A&

B~

C^

D|

Attempts:

3 left

💡 Hint

Common Mistakes

Using OR | or AND & instead of XOR.

Using NOT ~ which inverts bits.

The bitwise XOR operator in Verilog is ^. It returns 1 if the bits are different.

4fill in blank

hard

Fill both blanks to invert bits of input and then AND with mask.

Verilog

assign output = [1] input [2] mask;

Drag options to blanks, or click blank then click option'

A~

B&

C|

D^

Attempts:

3 left

💡 Hint

Common Mistakes

Using OR | instead of AND.

Not inverting input before AND.

The NOT operator ~ inverts bits of input. Then bitwise AND & with mask selects bits.

5fill in blank

hard

Fill all three blanks to create a mask that selects bits where a and b differ, then invert the result.

Verilog

assign mask = ~ (a [1] b) [2] c [3] d;

Drag options to blanks, or click blank then click option'

A^

B&

C|

D~

Attempts:

3 left

💡 Hint

Common Mistakes

Mixing up AND and OR operators.

Forgetting to invert the final result.

First, XOR ^ finds bits where a and b differ. Then AND & with c, finally OR | with d. The whole result is inverted with ~.

Practice

1. Which bitwise operator in Verilog flips each bit of a binary number?
~ is the symbol for which operator?

easy

A. XOR

B. NOT

C. OR

D. AND

Solution

1. Step 1: Understand the operator symbol

   The symbol ~ in Verilog is used to flip bits, meaning it changes 0 to 1 and 1 to 0.

2. Step 2: Match symbol to operator name

   This flipping action corresponds to the NOT operator, which inverts each bit.

3. Final Answer:

   NOT -> Option B

4. Quick Check:

   ~ = NOT [OK]

Hint: Remember ~ flips bits, so it's NOT operator [OK]

Common Mistakes:

• Confusing ~ with AND (&)
• Thinking ~ is OR (|)
• Mixing ~ with XOR (^)

2. Which of the following is the correct Verilog syntax for bitwise AND of two 4-bit vectors a and b?

easy

A. assign c = a & b;

B. assign c = a && b;

C. assign c = a | b;

D. assign c = a ^ b;

Solution

1. Step 1: Identify bitwise AND operator

   In Verilog, the bitwise AND operator is &, which works bit by bit on vectors.

2. Step 2: Check syntax correctness

   The syntax assign c = a & b; correctly assigns the bitwise AND of a and b to c.

3. Final Answer:

   assign c = a & b; -> Option A

4. Quick Check:

   & is bitwise AND [OK]

Hint: Use single & for bitwise AND, not && [OK]

Common Mistakes:

• Using && which is logical AND
• Confusing & with | (OR)
• Using ^ which is XOR

3. What is the 4-bit result of the following Verilog expression?
assign result = 4'b1101 ^ 4'b1011;

medium

A. 4'b1000

B. 4'b1110

C. 4'b0110

D. 4'b0010

Solution

1. Step 1: Understand XOR operation

   XOR (^) compares bits: if bits differ, result is 1; if same, result is 0.

2. Step 2: Calculate bitwise XOR

   Bits: 1101 ^ 1011
   1 ^ 1 = 0
   1 ^ 0 = 1
   0 ^ 1 = 1
   1 ^ 1 = 0
   Result = 0110

3. Final Answer:

   4'b0110 -> Option C

4. Quick Check:

   1101 ^ 1011 = 0110 [OK]

Hint: XOR gives 1 only if bits differ [OK]

Common Mistakes:

• Mixing XOR with OR or AND results
• Calculating bits incorrectly
• Confusing bit order

4. Identify the error in this Verilog code snippet:

assign out = a |& b;

where a and b are 4-bit vectors.

medium

A. Should use logical OR || instead

B. Missing semicolon at the end

C. Vectors a and b must be single bits

D. Operator |& is invalid for bitwise operations

Solution

1. Step 1: Check operator validity

   The operator |& is not a valid bitwise operator in Verilog; it is a reduction operator but used incorrectly here.

2. Step 2: Understand correct bitwise OR usage

   For bitwise OR between vectors, use | alone, like a | b.

3. Final Answer:

   Operator |& is invalid for bitwise operations -> Option D

4. Quick Check:

   |& is invalid here [OK]

Hint: Use single | for bitwise OR, not |& [OK]

Common Mistakes:

• Confusing reduction and bitwise operators
• Forgetting semicolon (though present here)
• Using logical OR || instead of bitwise |

5. Given two 4-bit vectors a = 4'b1010 and b = 4'b1100, which Verilog expression produces a 4-bit vector where bits are set to 1 only if the corresponding bits in a and b differ?

hard

A. assign c = a ^ b;

B. assign c = a & b;

C. assign c = a | b;

D. assign c = ~a;

Solution

1. Step 1: Understand the requirement

   We want bits set to 1 only where a and b differ.

2. Step 2: Identify operator for differing bits

   The XOR operator (^) sets bits to 1 where bits differ and 0 where they are the same.

3. Step 3: Apply XOR to given vectors

   For a = 1010 and b = 1100, a ^ b = 0110, which matches the requirement.

4. Final Answer:

   assign c = a ^ b; -> Option A

5. Quick Check:

   XOR gives 1 for differing bits [OK]

Hint: Use XOR (^) to find differing bits [OK]

Common Mistakes:

• Using AND (&) which gives common bits
• Using OR (|) which sets bits if either is 1
• Using NOT (~) which flips all bits