Bitwise operators (AND, OR, XOR, NOT) in Verilog - Practice Problems & Coding Challenges

Challenge - 5 Problems

❓ Predict Output

intermediate

Output of bitwise AND operation

What is the output of the following Verilog code snippet?

Verilog

module test;
  reg [3:0] a = 4'b1101;
  reg [3:0] b = 4'b1011;
  wire [3:0] c;
  assign c = a & b;
  initial begin
    $display("%b", c);
  end
endmodule

A 1111

B 1100

C 1001

D 1010

💡 Hint

Bitwise AND compares each bit of two numbers and returns 1 only if both bits are 1.

The bitwise AND of 1101 and 1011 is 1001 because only the first and last bits are both 1.

❓ Predict Output

intermediate

Result of bitwise OR operation

What will be printed by this Verilog code?

Verilog

module test;
  reg [3:0] x = 4'b0101;
  reg [3:0] y = 4'b0011;
  wire [3:0] z;
  assign z = x | y;
  initial begin
    $display("%b", z);
  end
endmodule

A 0100

B 0001

C 1111

D 0111

💡 Hint

Bitwise OR returns 1 if at least one bit is 1.

0101 OR 0011 results in 0111 because any bit that is 1 in either operand becomes 1.

❓ Predict Output

advanced

Output of bitwise XOR operation

What is the output of this Verilog code snippet?

Verilog

module test;
  reg [3:0] p = 4'b1100;
  reg [3:0] q = 4'b1010;
  wire [3:0] r;
  assign r = p ^ q;
  initial begin
    $display("%b", r);
  end
endmodule

A 0110

B 0101

C 1000

D 1110

💡 Hint

Bitwise XOR returns 1 only if bits differ.

1100 XOR 1010 equals 0110 because bits differ in positions 2 and 3.

❓ Predict Output

advanced

Result of bitwise NOT operation

What will this Verilog code print?

Verilog

module test;
  reg [3:0] val = 4'b1010;
  wire [3:0] not_val;
  assign not_val = ~val;
  initial begin
    $display("%b", not_val);
  end
endmodule

A 0101

B 0000

C 1111

D 1010

💡 Hint

Bitwise NOT flips each bit: 1 becomes 0, 0 becomes 1.

The NOT of 1010 is 0101 because each bit is inverted.

🧠 Conceptual

expert

Understanding combined bitwise operations

Given the following Verilog code, what is the output printed?

Verilog

module test;
  reg [3:0] a = 4'b1100;
  reg [3:0] b = 4'b1010;
  wire [3:0] result;
  assign result = ~(a & b) | (a ^ b);
  initial begin
    $display("%b", result);
  end
endmodule

A 1111

B 0000

C 0111

D 1001

💡 Hint

Break down the expression step-by-step: AND, NOT, XOR, then OR.

a & b = 1000; ~(a & b) = 0111; a ^ b = 0110; 0111 | 0110 = 0111.

Practice

1. Which bitwise operator in Verilog flips each bit of a binary number?
~ is the symbol for which operator?

easy

A. XOR

B. NOT

C. OR

D. AND

Solution

1. Step 1: Understand the operator symbol

   The symbol ~ in Verilog is used to flip bits, meaning it changes 0 to 1 and 1 to 0.

2. Step 2: Match symbol to operator name

   This flipping action corresponds to the NOT operator, which inverts each bit.

3. Final Answer:

   NOT -> Option B

4. Quick Check:

   ~ = NOT [OK]

Hint: Remember ~ flips bits, so it's NOT operator [OK]

Common Mistakes:

• Confusing ~ with AND (&)
• Thinking ~ is OR (|)
• Mixing ~ with XOR (^)

2. Which of the following is the correct Verilog syntax for bitwise AND of two 4-bit vectors a and b?

easy

A. assign c = a & b;

B. assign c = a && b;

C. assign c = a | b;

D. assign c = a ^ b;

Solution

1. Step 1: Identify bitwise AND operator

   In Verilog, the bitwise AND operator is &, which works bit by bit on vectors.

2. Step 2: Check syntax correctness

   The syntax assign c = a & b; correctly assigns the bitwise AND of a and b to c.

3. Final Answer:

   assign c = a & b; -> Option A

4. Quick Check:

   & is bitwise AND [OK]

Hint: Use single & for bitwise AND, not && [OK]

Common Mistakes:

• Using && which is logical AND
• Confusing & with | (OR)
• Using ^ which is XOR

3. What is the 4-bit result of the following Verilog expression?
assign result = 4'b1101 ^ 4'b1011;

medium

A. 4'b1000

B. 4'b1110

C. 4'b0110

D. 4'b0010

Solution

1. Step 1: Understand XOR operation

   XOR (^) compares bits: if bits differ, result is 1; if same, result is 0.

2. Step 2: Calculate bitwise XOR

   Bits: 1101 ^ 1011
   1 ^ 1 = 0
   1 ^ 0 = 1
   0 ^ 1 = 1
   1 ^ 1 = 0
   Result = 0110

3. Final Answer:

   4'b0110 -> Option C

4. Quick Check:

   1101 ^ 1011 = 0110 [OK]

Hint: XOR gives 1 only if bits differ [OK]

Common Mistakes:

• Mixing XOR with OR or AND results
• Calculating bits incorrectly
• Confusing bit order

4. Identify the error in this Verilog code snippet:

assign out = a |& b;

where a and b are 4-bit vectors.

medium

A. Should use logical OR || instead

B. Missing semicolon at the end

C. Vectors a and b must be single bits

D. Operator |& is invalid for bitwise operations

Solution

1. Step 1: Check operator validity

   The operator |& is not a valid bitwise operator in Verilog; it is a reduction operator but used incorrectly here.

2. Step 2: Understand correct bitwise OR usage

   For bitwise OR between vectors, use | alone, like a | b.

3. Final Answer:

   Operator |& is invalid for bitwise operations -> Option D

4. Quick Check:

   |& is invalid here [OK]

Hint: Use single | for bitwise OR, not |& [OK]

Common Mistakes:

• Confusing reduction and bitwise operators
• Forgetting semicolon (though present here)
• Using logical OR || instead of bitwise |

5. Given two 4-bit vectors a = 4'b1010 and b = 4'b1100, which Verilog expression produces a 4-bit vector where bits are set to 1 only if the corresponding bits in a and b differ?

hard

A. assign c = a ^ b;

B. assign c = a & b;

C. assign c = a | b;

D. assign c = ~a;

Solution

1. Step 1: Understand the requirement

   We want bits set to 1 only where a and b differ.

2. Step 2: Identify operator for differing bits

   The XOR operator (^) sets bits to 1 where bits differ and 0 where they are the same.

3. Step 3: Apply XOR to given vectors

   For a = 1010 and b = 1100, a ^ b = 0110, which matches the requirement.

4. Final Answer:

   assign c = a ^ b; -> Option A

5. Quick Check:

   XOR gives 1 for differing bits [OK]

Hint: Use XOR (^) to find differing bits [OK]

Common Mistakes:

• Using AND (&) which gives common bits
• Using OR (|) which sets bits if either is 1
• Using NOT (~) which flips all bits