Shift operators move bits left or right in a number. This helps change values quickly, like multiplying or dividing by 2.
To multiply a binary number by 2 or powers of 2 quickly.
To divide a binary number by 2 or powers of 2.
To move bits for creating masks or extracting parts of data.
To align bits in hardware design for signals or data buses.
Syntax
Verilog
result = value << shift_amount; // Left shift
result = value >> shift_amount; // Right shift
<< shifts bits to the left, adding zeros on the right.
>> shifts bits to the right, discarding bits on the left.
Examples
Shifts bits of 4 (0100) left by 1, becomes 1000 (8 decimal).
Verilog
result = 4 << 1; // result is8
Shifts bits of 8 (1000) right by 2, becomes 0010 (2 decimal).
Verilog
result = 8 >> 2; // result is2
Shifts bits of 5 (0101) left by 3, becomes 101000 (40 decimal).
Verilog
result = 5 << 3; // result is40
Sample Program
This program shows how shifting bits left and right changes the number. Left shift multiplies by 4, right shift divides by 2.
Verilog
module shift_example;
reg [7:0] value;
reg [7:0] result_left;
reg [7:0] result_right;
initial begin
value = 8'b00001111; // decimal 15
result_left = value << 2; // shift left by 2
result_right = value >> 1; // shift right by 1
$display("Original value: %b (decimal %0d)", value, value);
$display("Left shift by 2: %b (decimal %0d)", result_left, result_left);
$display("Right shift by 1: %b (decimal %0d)", result_right, result_right);
end
endmodule
OutputSuccess
Important Notes
Left shifting can cause bits to be lost if they move past the size limit.
Right shifting discards bits on the right, which can lose data.
Use the correct bit width to avoid unexpected results.
Summary
Shift operators move bits left or right in a binary number.
Left shift (<<) multiplies by powers of 2, right shift (>>) divides by powers of 2.
They are useful for fast math and bit manipulation in hardware design.
Practice
(1/5)
1. What does the left shift operator << do to a binary number in Verilog?
easy
A. Moves bits to the left, multiplying the number by powers of 2
B. Moves bits to the right, dividing the number by powers of 2
C. Reverses the bits in the number
D. Sets all bits to zero
Solution
Step 1: Understand the left shift operator
The left shift operator << moves all bits in a binary number to the left by a specified number of positions.
Step 2: Effect on the number's value
Moving bits left multiplies the number by 2 for each position shifted.
Final Answer:
Moves bits to the left, multiplying the number by powers of 2 -> Option A
Quick Check:
Left shift = multiply by 2 [OK]
Hint: Left shift multiplies by 2 powers quickly [OK]
Common Mistakes:
Confusing left shift with right shift
Thinking it reverses bits
Assuming it clears bits
2. Which of the following is the correct syntax to shift a 4-bit register reg [3:0] a; two bits to the right in Verilog?
easy
A. a >>> 2;
B. a >> 2;
C. a << 2;
D. a >> 2 =;
Solution
Step 1: Identify the right shift operator syntax
In Verilog, the right shift operator is >> and is used as variable >> number_of_bits;.
Step 2: Check the options for correct syntax
a >> 2; uses a >> 2; which correctly shifts a two bits to the right. a << 2; is left shift, a >>> 2; is arithmetic right shift (signed), and a >> 2 =; has invalid syntax.
Final Answer:
a >> 2; -> Option B
Quick Check:
Right shift syntax = a >> number [OK]
Hint: Use >> for right shift, << for left shift [OK]
Common Mistakes:
Using left shift operator instead of right shift
Confusing logical and arithmetic shifts
Writing invalid syntax like assignment inside shift
3. Given reg [7:0] x = 8'b00011010; what is the value of x << 3 in binary?
medium
A. 8'b11010000
B. 8'b11010000000
C. 8'b00011010
D. 8'b00000000
Solution
Step 1: Understand the initial value and shift
The initial value is 00011010 (decimal 26). Left shifting by 3 moves bits 3 places left, adding zeros on the right.
Step 2: Perform the left shift
Shifting left by 3: 00011010 becomes 11010000 (the leftmost bits shifted out are lost, and zeros fill from right).
Final Answer:
8'b11010000 -> Option A
Quick Check:
Left shift 3 bits = 11010000 [OK]
Hint: Left shift drops left bits, adds zeros right [OK]
Common Mistakes:
Expecting longer bit width after shift
Not losing bits shifted out
Confusing left and right shift effects
4. What is wrong with this Verilog code snippet?
reg [3:0] a = 4'b1010;
reg [3:0] b;
b = a >> 5;
medium
A. Right shift operator should be << instead of >>
B. Syntax error due to missing semicolon
C. Shifting by more bits than width causes all zeros
D. Cannot assign shifted value to a register
Solution
Step 1: Analyze the shift amount vs register width
The register a is 4 bits wide. Shifting right by 5 bits exceeds its width.
Step 2: Effect of shifting more than width
Shifting more bits than the width results in all bits shifted out, so the result is zero.
Final Answer:
Shifting by more bits than width causes all zeros -> Option C
Quick Check:
Shift > width = zero result [OK]
Hint: Shift count > width clears all bits [OK]
Common Mistakes:
Thinking syntax error occurs
Confusing left and right shift operators
Believing assignment to register is invalid
5. You want to multiply a 6-bit unsigned number num by 8 using shift operators in Verilog. Which expression correctly does this without overflow?
hard
A. num >>> 3
B. num >> 3
C. num << 2
D. num << 3
Solution
Step 1: Understand multiplication by powers of 2 using shifts
Multiplying by 8 equals multiplying by 2^3, so shifting left by 3 bits achieves this.
Step 2: Check for overflow considerations
Since num is 6 bits, shifting left by 3 bits results in a 9-bit value. To avoid overflow, the result should be stored in a wider register. The expression num << 3 correctly multiplies by 8.
Final Answer:
num << 3 -> Option D
Quick Check:
Multiply by 8 = shift left 3 [OK]
Hint: Multiply by 8 = shift left 3 bits [OK]
Common Mistakes:
Using right shift instead of left shift
Using arithmetic right shift (>>>)
Shifting by wrong number of bits
Recommended
Ready to prove it?
Pass the test and this pattern moves unknownstrongwhile earning +1 Grip toward your certificate.