File I/O for test vectors ($readmemh, $writememh) in Verilog - Mini Project: Build & Apply

File I/O for test vectors ($readmemh, $writememh)

📖 Scenario: You are designing a simple memory module in Verilog. You want to load test data from a file into the memory and then save the memory contents back to another file after some operations.

🎯 Goal: Build a Verilog testbench that uses $readmemh to load data from a file into a memory array, and then uses $writememh to write the memory contents to a file.

📋 What You'll Learn

Create a memory array of 8 elements, each 8 bits wide

Use $readmemh to load data from input_data.hex

Use a register count to track the number of elements

Use $writememh to save memory contents to output_data.hex

Print a message confirming the write operation

💡 Why This Matters

🌍 Real World

Loading and saving test vectors is common in hardware design verification to simulate real data inputs and capture outputs.

💼 Career

Understanding file I/O in Verilog is essential for FPGA and ASIC engineers who write testbenches and verify hardware modules.

1

Create memory array

Create a memory array called mem with 8 elements, each 8 bits wide.

Verilog

// Your code here
// Create memory array called mem with 8 elements of 8 bits each

Hint

Use reg [7:0] mem [0:7]; to declare an 8-element memory array with 8-bit width.

2

Add count register

Add a register called count of type integer to track the number of elements.

Verilog

reg [7:0] mem [0:7];
// Your code here
// Declare integer register count

Hint

Use integer count; to declare a register for counting.

3

Load data with $readmemh

In an initial block, use $readmemh to load data from input_data.hex into mem. Also set count to 8.

Verilog

reg [7:0] mem [0:7];
integer count;

initial begin
    // Your code here
    // Load mem from input_data.hex and set count to 8
end

Hint

Use $readmemh("input_data.hex", mem); inside an initial block to load the file.

4

Write data with $writememh and print message

In another initial block, use $writememh to write mem contents to output_data.hex. Then print "Memory contents saved." using $display.

Verilog

reg [7:0] mem [0:7];
integer count;

initial begin
    $readmemh("input_data.hex", mem);
    count = 8;
end

initial begin
    // Your code here
    // Write mem to output_data.hex and print confirmation
end

Hint

Use $writememh("output_data.hex", mem); and then $display("Memory contents saved."); inside an initial block.

Practice

1. What is the primary purpose of the Verilog system task $readmemh?

easy

A. To load hexadecimal data from a file into a memory array

B. To write memory contents to a file in binary format

C. To initialize registers with random values

D. To display memory contents on the console

Solution

1. Step 1: Understand $readmemh usage

   $readmemh is used to read hexadecimal data from a file and load it into a memory array in Verilog.

2. Step 2: Compare with other options

   Other options describe writing data, random initialization, or display, which are not the purpose of $readmemh.

3. Final Answer:

   To load hexadecimal data from a file into a memory array -> Option A

4. Quick Check:

   $readmemh loads hex data [OK]

Hint: Remember: $readmemh reads hex data into memory [OK]

Common Mistakes:

• Confusing $readmemh with $writememh
• Thinking it writes data instead of reading
• Assuming it reads binary instead of hex

2. Which of the following is the correct syntax to write memory contents to a hex file in Verilog?

easy

A. $readmemh("data.hex", mem_array);

B. $writememh("output.hex", mem_array);

C. $writehex("output.hex", mem_array);

D. $dumpmemh("output.hex", mem_array);

Solution

1. Step 1: Identify the correct system task for writing

   $writememh is the Verilog system task used to write memory contents to a hex file.

2. Step 2: Check syntax correctness

   The syntax $writememh("output.hex", mem_array); correctly specifies the file name and memory array.

3. Final Answer:

   $writememh("output.hex", mem_array); -> Option B

4. Quick Check:

   Write memory to hex file = $writememh [OK]

Hint: Use $writememh to save memory to hex file [OK]

Common Mistakes:

• Using $readmemh instead of $writememh
• Misspelling the system task name
• Using non-existent tasks like $writehex

3. Given the following Verilog code snippet, what will be the content of mem[0] after $readmemh executes if the file data.hex contains:
0A
1F
2B

reg [7:0] mem [0:2];
initial begin
  $readmemh("data.hex", mem);
end

medium

A. 8'h00

B. 8'h1F

C. 8'h2B

D. 8'h0A

Solution

1. Step 1: Understand $readmemh file loading order

   $readmemh loads the first line of the file into mem[0], second line into mem[1], and so on.

2. Step 2: Match file content to memory

   The first line is 0A, so mem[0] will be 8'h0A.

3. Final Answer:

   8'h0A -> Option D

4. Quick Check:

   First file line -> mem[0] = 0A [OK]

Hint: First file line loads into mem[0] with $readmemh [OK]

Common Mistakes:

• Assuming mem[0] gets last file line
• Confusing hex values with decimal
• Forgetting zero-based indexing

4. Identify the error in the following Verilog code snippet that attempts to write memory contents to a hex file:

reg [7:0] mem [0:3];
initial begin
  $writememh(mem, "output.hex");
end

medium

A. Missing file extension in filename

B. Memory array size is invalid

C. Arguments to $writememh are in wrong order

D. Cannot use $writememh inside initial block

Solution

1. Step 1: Check $writememh argument order

   The correct syntax is $writememh("filename", memory_array);. The code reverses these arguments.

2. Step 2: Verify other aspects

   Memory size and file extension are valid, and $writememh can be used inside initial blocks.

3. Final Answer:

   Arguments to $writememh are in wrong order -> Option C

4. Quick Check:

   Filename first, memory second in $writememh [OK]

Hint: Filename is first argument in $writememh [OK]

Common Mistakes:

• Swapping filename and memory array arguments
• Thinking file extension is mandatory
• Believing $writememh can't be in initial block

5. You want to test a memory module by loading test vectors from a hex file and then save the modified memory contents back to another hex file. Which sequence of Verilog system tasks correctly achieves this?

hard

A. $readmemh("input.hex", mem); // test$writememh("output.hex", mem); // save

B. $writememh("input.hex", mem); // test$readmemh("output.hex", mem); // save

C. $readmemh(mem, "input.hex"); // test$writememh(mem, "output.hex"); // save

D. $readmemh("output.hex", mem); // test$writememh("input.hex", mem); // save

Solution

1. Step 1: Load test vectors correctly

   Use $readmemh("input.hex", mem); to load test vectors from the input file into memory.

2. Step 2: Save modified memory correctly

   Use $writememh("output.hex", mem); to write the memory contents to the output file.

3. Final Answer:

   $readmemh("input.hex", mem); // test
   $writememh("output.hex", mem); // save -> Option A

4. Quick Check:

   Read first, then write with correct syntax [OK]

Hint: Read test vectors first, write results second [OK]

Common Mistakes:

• Reversing read and write order
• Swapping filename and memory arguments
• Using wrong filenames for read/write