Timescale directive in Verilog - Step-by-Step Execution

Concept Flow - Timescale directive

Start of Verilog file

↓

Read `timescale directive

↓

Set time unit and precision

↓

Use timescale for delays and simulation

↓

Simulation runs with defined time units

↓

End of simulation

The timescale directive sets the time unit and precision for simulation delays, affecting how time values are interpreted.

Execution Sample

Verilog

`timescale 1ns / 1ps
module test;
  initial begin
    #5 $display("Time: %0t", $time);
  end
endmodule

This code sets the timescale to 1 nanosecond unit and 1 picosecond precision, then waits 5 time units before printing the current simulation time.

Execution Table

Step	Action	Time Unit	Precision	Delay (#5)	Simulation Time Output
1	Read `timescale directive	1ns	1ps	-	-
2	Start simulation	1ns	1ps	-	0
3	Wait #5 delay	1ns	1ps	5 ns	-
4	After delay, execute $display	1ns	1ps	-	Time: 5
5	End simulation	1ns	1ps	-	-

💡 Simulation ends after initial block completes with delay and display executed.

Variable Tracker

Variable	Start	After Step 3	After Step 4	Final
$time	0	5 ns (after delay)	5 ns (displayed)	5 ns

Key Moments - 3 Insights

Why does the delay #5 correspond to 5 nanoseconds?

Because the timescale directive sets the time unit to 1ns, so #5 means 5 times 1ns = 5ns, as shown in execution_table step 3.

What happens if the timescale directive is missing?

The simulator uses a default timescale (often 1ns/1ps), but this can vary, causing delays to be interpreted differently, leading to inconsistent simulation times.

What does the precision part (1ps) affect?

Precision defines the smallest time step the simulator can represent; here, times are rounded to 1 picosecond increments, ensuring accurate timing within that resolution.

Visual Quiz - 3 Questions

Look at the execution_table, what is the simulation time output at step 4?

A Time: 0

B Time: 1

C Time: 5

D No output

💡 Hint

Check the 'Simulation Time Output' column at step 4 in the execution_table.

At which step does the delay of 5 time units complete?

A Step 3

B Step 2

C Step 4

D Step 5

💡 Hint

Look at the 'Delay (#5)' column in execution_table to find when the 5 ns delay happens.

If the timescale was changed to `timescale 1us / 1ns, what would #5 delay represent?

A 5 nanoseconds

B 5 microseconds

C 5 milliseconds

D 5 seconds

💡 Hint

The first number in timescale is the time unit; #5 means 5 times that unit.

Concept Snapshot

`timescale <time_unit> / <time_precision>
- Sets simulation time unit and precision
- Delays (#) multiply by time_unit
- Precision defines smallest time step
- Affects all time-related simulation values
Example: `timescale 1ns / 1ps means #1 = 1 nanosecond

Full Transcript

The timescale directive in Verilog sets the base time unit and precision for simulation. When the simulator reads `timescale 1ns / 1ps, it knows that all delays like #5 mean 5 times 1 nanosecond, or 5 nanoseconds. The precision 1ps means the simulator can measure time in steps as small as 1 picosecond. In the example code, the simulation starts at time 0, waits for 5 nanoseconds, then prints the current time as 5. Without the timescale directive, the simulator might use a default time unit, which can cause confusion. Understanding timescale helps control timing and delays accurately in your Verilog simulations.

Practice

1. What does the Verilog `timescale directive specify?

easy

A. The memory size for variables

B. The clock frequency of the design

C. The voltage levels for signals

D. The time unit and time precision for simulation

Solution

1. Step 1: Understand the purpose of `timescale

   The `timescale directive defines how time is measured and how precise the simulation timing is.

2. Step 2: Identify what it controls

   It sets the time unit (like 1ns) and the precision (like 1ps) for delays and timing in the simulation.

3. Final Answer:

   The time unit and time precision for simulation -> Option D

4. Quick Check:

   Timescale = time unit + precision [OK]

Hint: Timescale sets simulation time units and precision [OK]

Common Mistakes:

• Confusing timescale with clock frequency
• Thinking it sets voltage or memory size
• Placing it inside a module instead of top of file

2. Which of the following is the correct syntax for setting a timescale of 1 nanosecond unit and 10 picoseconds precision?

easy

A. `timescale 1ns / 10ps

B. `timescale 10ps / 1ns

C. `timescale 1ns, 10ps

D. `timescale 1ns 10ps

Solution

1. Step 1: Recall the correct syntax format

   The correct syntax uses a space after `timescale and a slash between unit and precision: `timescale time_unit / time_precision.

2. Step 2: Match the given options

   `timescale 1ns / 10ps matches this format exactly: `timescale 1ns / 10ps. Others use commas or wrong order.

3. Final Answer:

   `timescale 1ns / 10ps -> Option A

4. Quick Check:

   Syntax = `timescale unit / precision [OK]

Hint: Use slash '/' between unit and precision in timescale [OK]

Common Mistakes:

• Using comma instead of slash
• Swapping unit and precision order
• Omitting slash or space

3. Given the following code snippet, what is the delay time for #5 in real time?

`timescale 1ns / 1ps
module test;
  initial begin
    #5 $display("Delay reached");
  end
endmodule

medium

A. 5 nanoseconds

B. 5 picoseconds

C. 1 nanosecond

D. Cannot determine from code

Solution

1. Step 1: Identify the timescale unit

   The timescale is 1ns / 1ps, so the time unit is 1 nanosecond.

2. Step 2: Calculate the delay for #5

   The delay #5 means 5 times the time unit, so 5 x 1ns = 5 nanoseconds.

3. Final Answer:

   5 nanoseconds -> Option A

4. Quick Check:

   Delay #5 x 1ns = 5ns [OK]

Hint: Delay number x time unit = real delay [OK]

Common Mistakes:

• Confusing precision with time unit
• Thinking delay is in picoseconds
• Ignoring timescale directive

4. Identify the error in this Verilog code snippet:

`timescale 1ps / 1ns
module delay_test;
  initial begin
    #10 $display("Test delay");
  end
endmodule

medium

A. Timescale directive uses wrong separator

B. Time unit and precision order is incorrect

C. Delay value #10 is invalid

D. No error, code is correct

Solution

1. Step 1: Check the timescale format

   The timescale is `timescale 1ps / 1ns. The time unit should be larger or equal to precision, but here unit is 1ps and precision is 1ns, which is reversed.

2. Step 2: Understand the impact

   This reversed order is invalid because precision cannot be larger than unit, causing simulation errors.

3. Final Answer:

   Time unit and precision order is incorrect -> Option B

4. Quick Check:

   Unit must be ≥ precision [OK]

Hint: Time unit must be equal or larger than precision [OK]

Common Mistakes:

• Swapping unit and precision values
• Ignoring timescale order rules
• Assuming any order is valid

5. You want to simulate a design with delays specified in microseconds but need precision down to nanoseconds. Which `timescale directive should you use to achieve this?

hard

A. `timescale 1ns / 1us

B. `timescale 1us / 1ms

C. `timescale 1us / 1ns

D. `timescale 1ms / 1us

Solution

1. Step 1: Identify required time unit and precision

   The design delays are in microseconds (us), so time unit should be 1us. The precision needed is nanoseconds (ns), which is smaller than microseconds.

2. Step 2: Choose correct timescale format

   The timescale directive format is `timescale time_unit / time_precision. So it should be `timescale 1us / 1ns to have microsecond units and nanosecond precision.

3. Final Answer:

   `timescale 1us / 1ns -> Option C

4. Quick Check:

   Unit = us, Precision = ns [OK]

Hint: Unit bigger than precision, use `timescale unit / precision [OK]

Common Mistakes:

• Swapping unit and precision
• Using larger precision than unit
• Choosing unrelated time units