Timescale directive in Verilog - Practice Problems & Coding Challenges

Challenge - 5 Problems

❓ Predict Output

intermediate

Understanding timescale units and precision

What is the simulation time unit and precision for the following Verilog code snippet?

`timescale 1ns / 10ps
module test; endmodule

Verilog

`timescale 1ns / 10ps
module test; endmodule

A Time unit is 10 nanoseconds, precision is 1 picosecond

B Time unit is 10 picoseconds, precision is 1 nanosecond

C Time unit is 1 picosecond, precision is 10 nanoseconds

D Time unit is 1 nanosecond, precision is 10 picoseconds

💡 Hint

The first value after `timescale is the time unit, the second is the precision.

The `timescale directive syntax is `timescale / . Here, 1ns is the time unit and 10ps is the precision.

❓ Predict Output

intermediate

Effect of timescale on delay statements

Given the timescale directive and the following code, what is the actual delay time for the statement #5;?

`timescale 1us / 1ns
initial begin
  #5;
end

Verilog

`timescale 1us / 1ns
initial begin
  #5;
end

A 5 nanoseconds

B 5 microseconds

C 1 microsecond

D 5 milliseconds

💡 Hint

Delay values are in units of the time unit specified by `timescale.

The delay #5 means 5 times the time unit. Since time unit is 1 microsecond, delay is 5 microseconds.

🔧 Debug

advanced

Identify the error caused by conflicting timescale directives

What error or behavior occurs when two different `timescale directives are used in the same Verilog project for different modules?

Module A:
`timescale 1ns / 1ps
module A; endmodule

Module B:
`timescale 1us / 10ns
module B; endmodule

Verilog

`timescale 1ns / 1ps
module A; endmodule

`timescale 1us / 10ns
module B; endmodule

A Simulation time units differ causing inconsistent delays and timing mismatches

B Syntax error due to multiple `timescale directives

C Compiler ignores the second `timescale directive

D No effect; both modules use the first `timescale directive

💡 Hint

Each module can have its own timescale, but simulation tools may behave differently.

Different `timescale directives cause modules to interpret delays differently, leading to timing mismatches during simulation.

📝 Syntax

advanced

Correct syntax for timescale directive

Which of the following is the correct syntax for a timescale directive specifying a time unit of 100 picoseconds and precision of 10 picoseconds?

A `timescale 10ps / 100ps

B `timescale 100 / 10ps

C `timescale 100ps / 10ps

D `timescale 100ps : 10ps

💡 Hint

The format is `timescale / .

The correct syntax uses a slash '/' to separate time unit and precision, both with units specified.

🚀 Application

expert

Calculate simulation delay with given timescale and delay

Given the following Verilog code, what is the real time delay of the statement #3;?

`timescale 1ns / 1ps
initial begin
  #3;
end

Verilog

`timescale 1ns / 1ps
initial begin
  #3;
end

A 3 nanoseconds

B 3 picoseconds

C 1 nanosecond

D 3 microseconds

💡 Hint

Delay values are multiples of the time unit, not the precision.

The delay #3 means 3 times the time unit. Since the time unit is 1 nanosecond, the delay is 3 nanoseconds.

Practice

1. What does the Verilog `timescale directive specify?

easy

A. The memory size for variables

B. The clock frequency of the design

C. The voltage levels for signals

D. The time unit and time precision for simulation

Solution

1. Step 1: Understand the purpose of `timescale

   The `timescale directive defines how time is measured and how precise the simulation timing is.

2. Step 2: Identify what it controls

   It sets the time unit (like 1ns) and the precision (like 1ps) for delays and timing in the simulation.

3. Final Answer:

   The time unit and time precision for simulation -> Option D

4. Quick Check:

   Timescale = time unit + precision [OK]

Hint: Timescale sets simulation time units and precision [OK]

Common Mistakes:

• Confusing timescale with clock frequency
• Thinking it sets voltage or memory size
• Placing it inside a module instead of top of file

2. Which of the following is the correct syntax for setting a timescale of 1 nanosecond unit and 10 picoseconds precision?

easy

A. `timescale 1ns / 10ps

B. `timescale 10ps / 1ns

C. `timescale 1ns, 10ps

D. `timescale 1ns 10ps

Solution

1. Step 1: Recall the correct syntax format

   The correct syntax uses a space after `timescale and a slash between unit and precision: `timescale time_unit / time_precision.

2. Step 2: Match the given options

   `timescale 1ns / 10ps matches this format exactly: `timescale 1ns / 10ps. Others use commas or wrong order.

3. Final Answer:

   `timescale 1ns / 10ps -> Option A

4. Quick Check:

   Syntax = `timescale unit / precision [OK]

Hint: Use slash '/' between unit and precision in timescale [OK]

Common Mistakes:

• Using comma instead of slash
• Swapping unit and precision order
• Omitting slash or space

3. Given the following code snippet, what is the delay time for #5 in real time?

`timescale 1ns / 1ps
module test;
  initial begin
    #5 $display("Delay reached");
  end
endmodule

medium

A. 5 nanoseconds

B. 5 picoseconds

C. 1 nanosecond

D. Cannot determine from code

Solution

1. Step 1: Identify the timescale unit

   The timescale is 1ns / 1ps, so the time unit is 1 nanosecond.

2. Step 2: Calculate the delay for #5

   The delay #5 means 5 times the time unit, so 5 x 1ns = 5 nanoseconds.

3. Final Answer:

   5 nanoseconds -> Option A

4. Quick Check:

   Delay #5 x 1ns = 5ns [OK]

Hint: Delay number x time unit = real delay [OK]

Common Mistakes:

• Confusing precision with time unit
• Thinking delay is in picoseconds
• Ignoring timescale directive

4. Identify the error in this Verilog code snippet:

`timescale 1ps / 1ns
module delay_test;
  initial begin
    #10 $display("Test delay");
  end
endmodule

medium

A. Timescale directive uses wrong separator

B. Time unit and precision order is incorrect

C. Delay value #10 is invalid

D. No error, code is correct

Solution

1. Step 1: Check the timescale format

   The timescale is `timescale 1ps / 1ns. The time unit should be larger or equal to precision, but here unit is 1ps and precision is 1ns, which is reversed.

2. Step 2: Understand the impact

   This reversed order is invalid because precision cannot be larger than unit, causing simulation errors.

3. Final Answer:

   Time unit and precision order is incorrect -> Option B

4. Quick Check:

   Unit must be ≥ precision [OK]

Hint: Time unit must be equal or larger than precision [OK]

Common Mistakes:

• Swapping unit and precision values
• Ignoring timescale order rules
• Assuming any order is valid

5. You want to simulate a design with delays specified in microseconds but need precision down to nanoseconds. Which `timescale directive should you use to achieve this?

hard

A. `timescale 1ns / 1us

B. `timescale 1us / 1ms

C. `timescale 1us / 1ns

D. `timescale 1ms / 1us

Solution

1. Step 1: Identify required time unit and precision

   The design delays are in microseconds (us), so time unit should be 1us. The precision needed is nanoseconds (ns), which is smaller than microseconds.

2. Step 2: Choose correct timescale format

   The timescale directive format is `timescale time_unit / time_precision. So it should be `timescale 1us / 1ns to have microsecond units and nanosecond precision.

3. Final Answer:

   `timescale 1us / 1ns -> Option C

4. Quick Check:

   Unit = us, Precision = ns [OK]

Hint: Unit bigger than precision, use `timescale unit / precision [OK]

Common Mistakes:

• Swapping unit and precision
• Using larger precision than unit
• Choosing unrelated time units