Subtractor design in Verilog - Mini Project: Build & Apply

Subtractor design

📖 Scenario: You are designing a simple digital circuit that subtracts two 4-bit numbers. This is useful in many electronic devices where you need to find the difference between two values, like in calculators or digital clocks.

🎯 Goal: Build a Verilog module that subtracts two 4-bit inputs and outputs the 4-bit difference and a borrow bit.

📋 What You'll Learn

Create a Verilog module named subtractor with inputs a and b, both 4 bits wide.

Add an output diff that is 4 bits wide to hold the subtraction result.

Add an output borrow that indicates if a borrow occurred during subtraction.

Implement the subtraction logic inside the module using the - operator.

💡 Why This Matters

🌍 Real World

Subtractor circuits are used in digital devices like calculators, computers, and embedded systems to perform arithmetic operations.

💼 Career

Understanding how to design basic arithmetic modules in Verilog is essential for hardware engineers working on digital circuit design and FPGA programming.

1

Create the module and inputs

Write a Verilog module named subtractor with two 4-bit inputs called a and b.

Verilog

module subtractor(
    input [3:0] a,
    input [3:0] b
);
// Your code here
endmodule

Hint

Use module keyword and declare inputs with input [3:0].

2

Add outputs for difference and borrow

Add a 4-bit output called diff and a 1-bit output called borrow to the subtractor module.

Verilog

module subtractor(
    input [3:0] a,
    input [3:0] b,
    output [3:0] diff,
    output borrow
);
// Your code here
endmodule

Hint

Declare outputs similar to inputs but use output keyword.

3

Implement subtraction logic

Inside the subtractor module, declare a 5-bit wire called result and assign it the value of {1'b0, a} - {1'b0, b}. Then assign the lower 4 bits of result to diff and the highest bit to borrow.

Verilog

module subtractor(
    input [3:0] a,
    input [3:0] b,
    output [3:0] diff,
    output borrow
);
    wire [4:0] result;
    // Your code here
endmodule

Hint

Use assign statements to connect wires and outputs.

4

Test the subtractor output

Write a testbench module named test_subtractor that declares a, b, diff, and borrow. Instantiate the subtractor module. Assign a = 4'b1010 and b = 4'b0011. Use $display to print diff and borrow.

Verilog

module test_subtractor;
    reg [3:0] a;
    reg [3:0] b;
    wire [3:0] diff;
    wire borrow;

    subtractor uut(.a(a), .b(b), .diff(diff), .borrow(borrow));

    initial begin
        // Your code here
    end
endmodule

Hint

Use reg for inputs and wire for outputs in testbench. Use $display to print results.

Practice

1.

What is the main function of a subtractor in digital circuits?

easy

A. To multiply two binary numbers

B. To add two binary numbers

C. To find the difference between two binary numbers

D. To store binary data

Solution

1. Step 1: Understand the subtractor's purpose

   A subtractor is designed to calculate the difference between two binary inputs.

2. Step 2: Compare with other operations

   Adders add, multipliers multiply, and storage units store data, so these are not subtractors.

3. Final Answer:

   To find the difference between two binary numbers -> Option C

4. Quick Check:

   Subtractor = Difference finder [OK]

Hint: Subtractor always calculates difference, not sum or product [OK]

Common Mistakes:

• Confusing subtractor with adder
• Thinking subtractor stores data
• Mixing subtractor with multiplier

2.

Which of the following is the correct Verilog module header for a 1-bit subtractor?

module subtractor(

easy

A. module subtractor(input a, input b, output diff, output borrow);

B. module subtractor(input a, b, output diff, borrow);

C. module subtractor(a, b, diff, borrow);

D. module subtractor(input a, input b, input diff, output borrow);

Solution

1. Step 1: Check correct input/output declaration

   Inputs must be declared with 'input' keyword and outputs with 'output'.

2. Step 2: Verify syntax correctness

   module subtractor(input a, input b, output diff, output borrow); correctly declares inputs and outputs with proper keywords and commas.

3. Final Answer:

   module subtractor(input a, input b, output diff, output borrow); -> Option A

4. Quick Check:

   Correct input/output syntax = module subtractor(input a, input b, output diff, output borrow); [OK]

Hint: Always declare inputs and outputs explicitly with keywords [OK]

Common Mistakes:

• Omitting input/output keywords
• Listing inputs and outputs without keywords
• Declaring outputs as inputs

3.

What is the output difference and borrow when inputs a=1 and b=0 are applied to this 1-bit subtractor module?

assign diff = a ^ b ^ borrow_in;
assign borrow_out = (~a & b) | (borrow_in & (~a ^ b));

Assume borrow_in = 0.

medium

A. diff = 0, borrow_out = 0

B. diff = 0, borrow_out = 1

C. diff = 1, borrow_out = 1

D. diff = 1, borrow_out = 0

Solution

1. Step 1: Calculate diff with given inputs

   diff = a ^ b ^ borrow_in = 1 ^ 0 ^ 0 = 1

2. Step 2: Calculate borrow_out with given inputs

   borrow_out = (~a & b) | (borrow_in & (~a ^ b)) = (0 & 0) | (0 & (0 ^ 0)) = 0

3. Final Answer:

   diff = 1, borrow_out = 0 -> Option D

4. Quick Check:

   1 - 0 = 1, no borrow needed [OK]

Hint: XOR inputs and borrow_in for diff; borrow if a < b [OK]

Common Mistakes:

• Forgetting borrow_in in diff calculation
• Misapplying borrow logic
• Mixing up a and b in borrow expression

4.

Identify the error in this Verilog code for a 1-bit subtractor:

module subtractor(input a, input b, output diff, output borrow);
  assign diff = a - b;
  assign borrow = (b > a);
endmodule

medium

A. Using '-' operator for bitwise subtraction is incorrect in Verilog

B. 'borrow' should be declared as 'output reg' instead of 'output'

C. The module lacks a clock input for synchronous operation

D. The borrow calculation logic is incorrect

Solution

1. Step 1: Check arithmetic operator usage

   Verilog '-' operator performs arithmetic subtraction but does not produce borrow output directly.

2. Step 2: Understand borrow signal generation

   Borrow must be calculated using logic expressions, not by comparing b and a with '>' operator.

3. Final Answer:

   Using '-' operator for bitwise subtraction is incorrect in Verilog -> Option A

4. Quick Check:

   Subtractor needs logic for borrow, not '-' operator [OK]

Hint: Use logic expressions for borrow, not '-' operator [OK]

Common Mistakes:

• Using arithmetic '-' expecting borrow output
• Ignoring borrow logic
• Assuming '>' operator works for borrow

5.

Design a 2-bit subtractor using two 1-bit subtractor modules connected in series. Which of the following correctly describes the borrow connection?

hard

A. The borrow input of the least significant bit subtractor connects to the borrow output of the most significant bit subtractor

B. The borrow output of the least significant bit subtractor connects to the borrow input of the most significant bit subtractor

C. The borrow outputs of both subtractors are connected together to form a single borrow output

D. The borrow inputs of both subtractors are tied to 0

Solution

1. Step 1: Understand borrow chaining in multi-bit subtractors

   Borrow from the lower bit subtractor must feed into the higher bit subtractor's borrow input.

2. Step 2: Verify connection direction

   The least significant bit's borrow output connects to the most significant bit's borrow input to propagate borrow correctly.

3. Final Answer:

   The borrow output of the least significant bit subtractor connects to the borrow input of the most significant bit subtractor -> Option B

4. Quick Check:

   Borrow chains from LSB to MSB [OK]

Hint: Borrow flows from lower to higher bits in subtractors [OK]

Common Mistakes:

• Connecting borrow inputs to zero for all bits
• Connecting borrow outputs together incorrectly
• Reversing borrow input/output connections