NVIC (Nested Vectored Interrupt Controller) in ARM Architecture - Practice Problems & Coding Challenges

Challenge - 5 Problems

🧠 Conceptual

intermediate

Understanding NVIC Priority Grouping

What does the priority grouping in NVIC control?

A It controls how many bits are used for pre-emption priority and how many for subpriority.

B It sets the total number of interrupts the NVIC can handle.

C It determines the clock speed of the NVIC module.

D It enables or disables the nested interrupt feature.

💡 Hint

Think about how NVIC decides which interrupt is more important when multiple occur.

Priority grouping splits the priority bits into pre-emption priority and subpriority bits. Pre-emption priority decides if an interrupt can interrupt another, while subpriority decides order when priorities are equal.

📋 Factual

intermediate

NVIC Interrupt Enable Registers

Which NVIC register is used to enable a specific interrupt?

A NVIC_STIR (Software Trigger Interrupt Register)

B NVIC_ICER (Interrupt Clear-Enable Register)

C NVIC_IPR (Interrupt Priority Register)

D NVIC_ISER (Interrupt Set-Enable Register)

💡 Hint

Look for the register that sets bits to enable interrupts.

The NVIC_ISER register is used to enable interrupts by setting bits corresponding to interrupt numbers.

🔍 Analysis

advanced

NVIC Behavior on Nested Interrupts

Given two interrupts with different pre-emption priorities, what happens when both occur simultaneously?

A The interrupt with lower pre-emption priority executes first.

B Both interrupts execute simultaneously in parallel.

C The interrupt with higher pre-emption priority executes first and can pre-empt the other.

D The NVIC disables both interrupts to avoid conflict.

💡 Hint

Consider how NVIC prioritizes interrupts based on priority levels.

NVIC uses pre-emption priority to decide which interrupt can interrupt another. The higher priority interrupt runs first and can pre-empt the lower priority one.

❓ Comparison

advanced

Difference Between NVIC and Traditional Interrupt Controllers

Which feature distinguishes the NVIC from traditional interrupt controllers?

A NVIC does not support interrupt masking or disabling.

B NVIC supports dynamic priority levels and nested interrupts with hardware support.

C NVIC requires software to manually save and restore context for interrupts.

D NVIC can only handle one interrupt at a time without nesting.

💡 Hint

Think about how NVIC improves interrupt handling efficiency.

NVIC provides hardware support for nested interrupts and flexible priority levels, allowing interrupts to pre-empt others efficiently.

❓ Reasoning

expert

Effect of Incorrect Priority Configuration in NVIC

If all interrupts are configured with the same pre-emption priority but different subpriorities, what is the effect on interrupt handling?

A No interrupt can pre-empt another; subpriority only decides order when interrupts are pending simultaneously.

B Interrupts with higher subpriority will pre-empt those with lower subpriority.

C NVIC will treat all interrupts as having different pre-emption priorities ignoring subpriority.

D NVIC disables all interrupts due to priority conflict.

💡 Hint

Recall the role of pre-emption priority versus subpriority in NVIC.

When pre-emption priorities are equal, no interrupt can pre-empt another. Subpriority only affects the order of pending interrupts but not pre-emption.

Practice

1. What is the main purpose of the NVIC in ARM microcontrollers?

easy

A. To increase the clock speed of the processor

B. To manage and prioritize multiple interrupts efficiently

C. To store program instructions

D. To handle memory allocation

Solution

1. Step 1: Understand NVIC's role

   NVIC stands for Nested Vectored Interrupt Controller, which manages interrupts.

2. Step 2: Identify its main function

   It enables, disables, and prioritizes interrupts so the processor can respond quickly to important events.

3. Final Answer:

   To manage and prioritize multiple interrupts efficiently -> Option B

4. Quick Check:

   NVIC controls interrupts = B [OK]

Hint: NVIC is about interrupt control, not speed or memory [OK]

Common Mistakes:

• Confusing NVIC with clock or memory functions
• Thinking NVIC stores program code
• Assuming NVIC increases processor speed

2. Which of the following is the correct way to enable an interrupt using NVIC in ARM Cortex-M?

easy

A. NVIC_SetPriority(IRQn, priority);

B. NVIC_DisableIRQ(IRQn);

C. NVIC_EnableIRQ(IRQn);

D. NVIC_ClearPendingIRQ(IRQn);

Solution

1. Step 1: Identify function purpose

   NVIC_EnableIRQ is used to enable a specific interrupt request (IRQ).

2. Step 2: Compare other options

   NVIC_DisableIRQ disables interrupts, NVIC_SetPriority sets priority, NVIC_ClearPendingIRQ clears pending interrupts.

3. Final Answer:

   NVIC_EnableIRQ(IRQn); -> Option C

4. Quick Check:

   Enable interrupt function = NVIC_EnableIRQ [OK]

Hint: Enable interrupts with NVIC_EnableIRQ function [OK]

Common Mistakes:

• Confusing enable with disable functions
• Mixing priority setting with enabling
• Using clear pending instead of enable

3. Consider the following code snippet for ARM Cortex-M NVIC:

NVIC_SetPriority(TIM2_IRQn, 2);
NVIC_EnableIRQ(TIM2_IRQn);
NVIC_SetPriority(USART1_IRQn, 1);
NVIC_EnableIRQ(USART1_IRQn);

Which interrupt has higher priority?

medium

A. USART1_IRQn has higher priority

B. TIM2_IRQn has higher priority

C. Both have equal priority

D. Priority cannot be determined

Solution

1. Step 1: Understand priority values

   Lower numeric priority value means higher priority in NVIC.

2. Step 2: Compare priorities set

   TIM2_IRQn is set to 2, USART1_IRQn is set to 1, so USART1_IRQn has higher priority.

3. Final Answer:

   USART1_IRQn has higher priority -> Option A

4. Quick Check:

   Lower number = higher priority = USART1_IRQn [OK]

Hint: Lower priority number means higher priority [OK]

Common Mistakes:

• Assuming higher number means higher priority
• Ignoring priority values and focusing on enable order
• Confusing IRQ names

4. A developer wrote this code to disable an interrupt but it does not work as expected:

NVIC_EnableIRQ(EXTI0_IRQn);
NVIC_DisableIRQ(EXTI1_IRQn);

What is the likely mistake?

medium

A. The priority must be set before disabling

B. NVIC_DisableIRQ cannot disable interrupts

C. Interrupts must be disabled before enabling

D. They enabled EXTI0_IRQn but disabled EXTI1_IRQn instead

Solution

1. Step 1: Analyze the code

   The code enables EXTI0_IRQn but disables EXTI1_IRQn, which are different interrupts.

2. Step 2: Identify the mistake

   If the goal was to disable EXTI0_IRQn, disabling EXTI1_IRQn is incorrect.

3. Final Answer:

   They enabled EXTI0_IRQn but disabled EXTI1_IRQn instead -> Option D

4. Quick Check:

   Mismatch in IRQ numbers = mistake [OK]

Hint: Check IRQ names carefully when enabling/disabling [OK]

Common Mistakes:

• Disabling wrong interrupt number
• Believing disable function doesn't work
• Thinking priority affects disabling

5. You want to ensure that a critical sensor interrupt always preempts a less important communication interrupt. How should you configure NVIC priorities for SENSOR_IRQn and COMM_IRQn?

hard

A. Set SENSOR_IRQn priority lower than COMM_IRQn (e.g., SENSOR=0, COMM=1)

B. Set SENSOR_IRQn priority higher than COMM_IRQn (e.g., SENSOR=2, COMM=1)

C. Disable COMM_IRQn and enable SENSOR_IRQn only

D. Set both priorities equal and enable both

Solution

1. Step 1: Recall NVIC priority rules

   Lower numeric priority means higher priority and can preempt others.

2. Step 2: Apply to SENSOR and COMM interrupts

   To let SENSOR_IRQn preempt COMM_IRQn, SENSOR_IRQn must have a lower priority number.

3. Final Answer:

   Set SENSOR_IRQn priority lower than COMM_IRQn (e.g., SENSOR=0, COMM=1) -> Option A

4. Quick Check:

   Lower number = higher priority = SENSOR_IRQn preempts [OK]

Hint: Lower priority number means higher interrupt priority [OK]

Common Mistakes:

• Assigning higher number for higher priority
• Disabling interrupts instead of prioritizing
• Setting equal priorities expecting preemption