Exception priority levels in ARM Architecture

Introduction

Exception priority levels help the processor decide which interrupt or error to handle first when multiple happen at the same time.

When multiple hardware interrupts occur simultaneously and the processor must choose which one to handle first.

When designing embedded systems that need to respond quickly to critical events.

When programming ARM processors to manage different types of exceptions like faults, interrupts, or system calls.

When debugging why certain interrupts are delayed or not serviced promptly.

When configuring the Nested Vectored Interrupt Controller (NVIC) in ARM Cortex processors.

Core Concept

ARM Architecture

Exception priority levels are assigned as numeric values, where a lower number means higher priority.
For example:
Priority 0 = highest priority
Priority 255 = lowest priority

Priority levels are usually set in the interrupt controller registers.

Lower numeric values mean higher priority, so 0 is the highest priority.

Key Points

This sets interrupt number 5 to priority level 2, which is high priority but not the highest.

ARM Architecture

Set priority of interrupt 5 to 2
NVIC_SetPriority(5, 2);

This sets interrupt number 10 to a lower priority, so it will be handled after higher priority interrupts.

ARM Architecture

Set priority of interrupt 10 to 10
NVIC_SetPriority(10, 10);

Detailed Explanation

This example sets two interrupts with different priorities. Interrupt 3 has the highest priority (0), so it will be handled before interrupt 7, which has priority 5.

ARM Architecture

#include "stm32f4xx.h"

int main() {
    // Set priority for interrupt 3 to highest (0)
    NVIC_SetPriority(3, 0);
    // Set priority for interrupt 7 to lower (5)
    NVIC_SetPriority(7, 5);

    // Enable interrupts
    NVIC_EnableIRQ(3);
    NVIC_EnableIRQ(7);

    while(1) {
        // Main loop
    }
    return 0;
}

Important Notes

Exception priority levels allow critical tasks to interrupt less important ones.

Some ARM processors support grouping priorities to manage preemption and subpriority.

Always check your processor's documentation for the number of priority bits supported.

Summary

Exception priority levels determine the order in which interrupts are handled.

Lower numeric priority means higher importance.

Setting priorities helps manage multiple simultaneous exceptions efficiently.

Practice

1. In ARM architecture, what does a lower exception priority number indicate?

easy

A. No priority assigned

B. Lower priority for handling the exception

C. Higher priority for handling the exception

D. Equal priority to all exceptions

Solution

1. Step 1: Understand priority numbering in ARM

   In ARM processors, exception priority levels use numbers where lower numbers mean higher priority.

2. Step 2: Interpret the meaning of lower numbers

   A lower number means the exception is handled before others with higher numbers.

3. Final Answer:

   Higher priority for handling the exception -> Option C

4. Quick Check:

   Lower number = Higher priority [OK]

Hint: Lower number means higher priority in ARM exceptions [OK]

Common Mistakes:

• Thinking higher numbers mean higher priority
• Assuming all exceptions have equal priority
• Confusing priority with exception type

2. Which of the following correctly represents the priority order in ARM exception levels from highest to lowest?

easy

A. 3, 2, 1, 0

B. 0, 1, 2, 3

C. 1, 0, 3, 2

D. 2, 3, 0, 1

Solution

1. Step 1: Recall ARM priority numbering

   Lower numbers indicate higher priority, so priority order starts from 0 upwards.

2. Step 2: Arrange numbers from lowest to highest

   The correct order from highest to lowest priority is 0, 1, 2, 3.

3. Final Answer:

   0, 1, 2, 3 -> Option B

4. Quick Check:

   Priority order = 0 to 3 [OK]

Hint: Priority order counts up from 0 as highest [OK]

Common Mistakes:

• Reversing the order thinking higher numbers are higher priority
• Mixing up the sequence of numbers
• Assuming priority starts at 1 instead of 0

3. Given these exception priorities in ARM: IRQ = 2, FIQ = 0, SVC = 1, which exception will be handled first?

medium

A. FIQ

B. IRQ

C. SVC

D. All handled simultaneously

Solution

1. Step 1: Identify priority numbers for each exception

   FIQ has priority 0, SVC has 1, IRQ has 2.

2. Step 2: Determine which priority is highest

   Lower number means higher priority, so FIQ with 0 is handled first.

3. Final Answer:

   FIQ -> Option A

4. Quick Check:

   Lowest number (0) = FIQ first [OK]

Hint: Exception with priority 0 handled first [OK]

Common Mistakes:

• Choosing IRQ because it sounds more common
• Assuming SVC is highest priority by name
• Thinking all exceptions run at the same time

4. If an ARM system incorrectly assigns a higher number to a critical exception, what is the likely problem?

medium

A. The critical exception may be delayed or ignored

B. The system will crash immediately

C. All exceptions will have equal priority

D. The critical exception will run first anyway

Solution

1. Step 1: Understand priority impact on handling

   Higher numbers mean lower priority, so a critical exception with a high number is handled later.

2. Step 2: Predict system behavior

   This delay can cause the critical exception to be delayed or missed, affecting system reliability.

3. Final Answer:

   The critical exception may be delayed or ignored -> Option A

4. Quick Check:

   Wrong priority number delays critical exception [OK]

Hint: Critical exceptions need lowest priority number [OK]

Common Mistakes:

• Assuming system crashes immediately
• Thinking priority numbers do not affect handling
• Believing all exceptions run equally regardless of priority

5. You have three exceptions with priorities: Timer = 1, UART = 3, Reset = 0. If Timer, UART, and Reset exceptions occur simultaneously, which will ARM handle first and why?

hard

A. UART, because it has the highest number

B. Timer, because it occurs first

C. Timer, because it has a medium priority

D. Reset, because it has the lowest number

Solution

1. Step 1: Identify priorities and exceptions involved

   Reset has priority 0, Timer 1, UART 3. Timer, UART, and Reset occur simultaneously.

2. Step 2: Determine which exception ARM handles first

   ARM handles the exception with the lowest priority number first, which is Reset with 0.

3. Step 3: Understand simultaneous exceptions handling

   Since Reset has the highest priority, it preempts others.

4. Final Answer:

   Reset, because it has the lowest number -> Option D

5. Quick Check:

   Lowest number = highest priority = Reset first [OK]

Hint: Lowest priority number exception handled first always [OK]

Common Mistakes:

• Overlooking Reset's highest priority
• Picking Timer due to medium priority
• Choosing UART because it occurs simultaneously