The vector table structure helps the processor know where to jump when an interrupt or exception happens. It organizes addresses for handling different events.
Vector table structure in ARM Architecture
Vector Table: - Entry 0: Initial Stack Pointer - Entry 1: Reset Handler Address - Entry 2: NMI Handler Address - Entry 3: HardFault Handler Address - ... - Other exception and interrupt handler addresses
The vector table is usually placed at a fixed memory address, often at the start of the memory.
Each entry is a 32-bit address pointing to the start of a handler function.
0x00000000: 0x20002000 ; Initial Stack Pointer 0x00000004: 0x00001000 ; Reset Handler 0x00000008: 0x00001010 ; NMI Handler 0x0000000C: 0x00001020 ; HardFault Handler
Vector Table in C: void (* const vector_table[])(void) __attribute__((section(".isr_vector"))) = { (void (*)(void))((unsigned long)&_estack), Reset_Handler, NMI_Handler, HardFault_Handler, // Other handlers };
This program defines a simple vector table with initial stack pointer and three handlers. The vector table is placed in a special memory section so the processor can find it at startup.
# Example vector table entries in C #include <stdint.h> extern uint32_t _estack; void Reset_Handler(void) { // Reset code here } void NMI_Handler(void) { // NMI code here } void HardFault_Handler(void) { // HardFault code here } void (* const vector_table[])(void) __attribute__((section(".isr_vector"))) = { (void (*)(void))&_estack, // Initial Stack Pointer Reset_Handler, // Reset Handler NMI_Handler, // NMI Handler HardFault_Handler // HardFault Handler }; int main() { // Main program return 0; }
The first entry is not a function but the initial stack pointer value.
Each following entry is the address of a function that handles a specific interrupt or exception.
The vector table must be aligned and placed at the correct memory address for the processor to use it properly.
The vector table organizes addresses for interrupt and exception handlers.
The first entry is the initial stack pointer, followed by handler addresses.
It is essential for the processor to know where to jump when events occur.