Subroutine call convention (AAPCS) in ARM Architecture - Interactive Code Practice

Practice - 5 Tasks

1fill in blank

easy

Complete the code to identify the register used for the first argument in AAPCS.

ARM Architecture

The first argument to a subroutine is passed in register [1] according to AAPCS.

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Ar4

Br12

Cr0

Dr7

Attempts:

3 left

💡 Hint

Common Mistakes

Confusing argument registers with callee-saved registers.

Assuming arguments start from r4 or higher.

In the ARM Architecture Procedure Call Standard (AAPCS), the first argument is passed in register r0.

2fill in blank

medium

Complete the code to specify how many registers are used for passing arguments in AAPCS.

ARM Architecture

AAPCS uses up to [1] registers to pass arguments before using the stack.

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A2

B8

C6

D4

Attempts:

3 left

💡 Hint

Common Mistakes

Assuming all arguments are passed in registers.

Confusing the number of argument registers with total registers.

AAPCS specifies that up to 4 registers (r0 to r3) are used to pass arguments. Additional arguments are passed on the stack.

3fill in blank

hard

Fix the error in the statement about callee-saved registers in AAPCS.

ARM Architecture

Registers [1] to r7 are callee-saved according to AAPCS.

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Ar1

Br4

Cr0

Dr3

Attempts:

3 left

💡 Hint

Common Mistakes

Confusing caller-saved and callee-saved registers.

Assuming r0 is callee-saved.

In AAPCS, registers r4 to r7 are callee-saved, meaning the called function must preserve their values.

4fill in blank

hard

Fill both blanks to complete the rule about the stack pointer and link register in AAPCS.

ARM Architecture

The [1] register holds the return address, and the [2] register points to the top of the stack.

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Alr

Bpc

Csp

Dr0

Attempts:

3 left

💡 Hint

Common Mistakes

Mixing up the program counter (pc) with the link register (lr).

Confusing general-purpose registers with special registers.

The lr (link register) holds the return address, and the sp (stack pointer) points to the top of the stack in AAPCS.

5fill in blank

hard

Fill all three blanks to complete the dictionary comprehension that maps argument registers to their usage in AAPCS.

ARM Architecture

arg_registers = [1]: 'first', [2]: 'second', [3]: 'third'}

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Ar0

Br1

Cr2

Dr3

Attempts:

3 left

💡 Hint

Common Mistakes

Using registers out of order.

Including registers beyond the third argument.

According to AAPCS, r0 is the first argument register, r1 the second, and r2 the third.

Practice

1. According to the AAPCS, which registers are primarily used to pass the first four arguments to a subroutine?

easy

A. r0 to r3

B. r4 to r7

C. r8 to r11

D. lr and pc

Solution

1. Step 1: Understand argument passing in AAPCS

   The AAPCS specifies that the first four arguments to a subroutine are passed using registers r0, r1, r2, and r3.

2. Step 2: Identify the correct register range

   Registers r4 to r11 are used for other purposes, and lr (link register) stores the return address, not arguments.

3. Final Answer:

   r0 to r3 -> Option A

4. Quick Check:

   Arguments passed in r0-r3 [OK]

Hint: Remember: first 4 args in r0-r3 registers [OK]

Common Mistakes:

• Confusing argument registers with callee-saved registers
• Thinking lr or pc hold arguments
• Assuming stack is always used first

2. Which register is used to store the return address when a subroutine is called under AAPCS?

easy

A. lr

B. r0

C. pc

D. sp

Solution

1. Step 1: Identify the purpose of the link register (lr)

   In AAPCS, the link register (lr) holds the return address when a subroutine is called.

2. Step 2: Differentiate from other registers

   r0 is for return values, pc is the program counter (current instruction), and sp is the stack pointer, not for return addresses.

3. Final Answer:

   lr -> Option A

4. Quick Check:

   Return address stored in lr [OK]

Hint: Return address always saved in lr register [OK]

Common Mistakes:

• Confusing lr with pc (program counter)
• Thinking r0 holds return address
• Assuming sp stores return address

3. Consider a subroutine that takes 5 integer arguments. According to AAPCS, how are these arguments passed?

medium

A. All 5 arguments passed in r0 to r4

B. First 4 in r0 to r3, 5th on the stack

C. All 5 arguments passed on the stack

D. First 3 in r0 to r2, remaining 2 in r3 and r4

Solution

1. Step 1: Recall argument passing rules for more than 4 arguments

   AAPCS passes the first 4 arguments in registers r0 to r3. Any additional arguments are passed on the stack.

2. Step 2: Apply to 5 arguments

   For 5 arguments, the first 4 go into r0-r3, and the 5th argument is placed on the stack.

3. Final Answer:

   First 4 in r0 to r3, 5th on the stack -> Option B

4. Quick Check:

   Extra args beyond 4 go on stack [OK]

Hint: Only first 4 args in registers; rest go on stack [OK]

Common Mistakes:

• Assuming all args fit in registers
• Passing 5th arg in r4 incorrectly
• Ignoring stack usage for extra args

4. A programmer notices that after a subroutine call, the value in register r4 is unexpectedly changed. What is the most likely cause under AAPCS?

medium

A. r4 is a caller-saved register and was not preserved by the caller

B. r4 holds the return address and was corrupted

C. r4 is used to pass arguments and was overwritten

D. r4 is a callee-saved register and the callee did not save it

Solution

1. Step 1: Understand register saving responsibilities

   Under AAPCS, registers r4 to r11 are callee-saved, meaning the called function must save and restore them if it uses them.

2. Step 2: Identify the cause of unexpected change

   If r4 changed unexpectedly, it means the callee did not save and restore it properly, causing corruption.

3. Final Answer:

   r4 is a callee-saved register and the callee did not save it -> Option D

4. Quick Check:

   Callee must save r4-r11 [OK]

Hint: Callee saves r4-r11; caller saves r0-r3 [OK]

Common Mistakes:

• Thinking r4 is caller-saved
• Confusing argument registers with saved registers
• Assuming r4 holds return address

5. You need to write a subroutine that returns a 64-bit integer result. According to AAPCS, how should the return value be passed back to the caller?

hard

A. On the stack, not in registers

B. In r0 only, using 64 bits

C. In r0 and r1 combined

D. In r2 and r3 combined

Solution

1. Step 1: Recall return value passing rules for 64-bit values

   AAPCS specifies that 64-bit return values are passed using two registers: r0 and r1 combined.

2. Step 2: Eliminate incorrect options

   r0 alone holds 32 bits, so it cannot hold 64-bit values. Stack is not used for normal return values. r2 and r3 are not used for return values.

3. Final Answer:

   In r0 and r1 combined -> Option C

4. Quick Check:

   64-bit return uses r0 and r1 [OK]

Hint: 64-bit returns use r0 and r1 registers together [OK]

Common Mistakes:

• Assuming 64-bit fits in r0 alone
• Returning via stack unnecessarily
• Using wrong registers for return