Subroutine call convention (AAPCS) in ARM Architecture - Practice Problems & Coding Challenges

Challenge - 5 Problems

🧠 Conceptual

intermediate

Understanding Register Usage in AAPCS

According to the ARM Architecture Procedure Call Standard (AAPCS), which registers are typically used to pass the first four integer or pointer arguments to a subroutine?

A r12 to r15

B r8 to r11

C r0 to r3

D r4 to r7

💡 Hint

Think about the registers reserved for argument passing before the stack is used.

The AAPCS specifies that the first four integer or pointer arguments are passed in registers r0, r1, r2, and r3. Additional arguments are passed on the stack.

📋 Factual

intermediate

Stack Alignment Requirement in AAPCS

What is the required stack alignment in bytes at a subroutine call boundary according to the AAPCS?

A 4 bytes

B 8 bytes

C 32 bytes

D 16 bytes

💡 Hint

Consider the minimum alignment to maintain data consistency and performance.

The AAPCS requires the stack to be 16-byte aligned at a subroutine call boundary to ensure proper data alignment and efficient access.

🔍 Analysis

advanced

Return Value Location in AAPCS

In the AAPCS, where is the return value of a function typically placed if it is a 32-bit integer?

A r0 register

B r1 register

C Stack top

D r7 register

💡 Hint

Think about where the first argument register overlaps with return values.

The AAPCS specifies that the return value for 32-bit integers is placed in the r0 register.

❓ Comparison

advanced

Caller vs Callee Saved Registers in AAPCS

Which of the following registers are callee-saved according to the AAPCS?

A r4 to r11

B r0 to r3

C r12 and r14

D r0 to r7

💡 Hint

Consider which registers the called function must preserve.

Registers r4 to r11 are callee-saved, meaning the called function must save and restore them if it uses them.

❓ Reasoning

expert

Effect of Violating Stack Alignment in AAPCS

What is the most likely consequence if a subroutine call violates the 8-byte stack alignment rule specified by the AAPCS?

A No effect; stack alignment is only a recommendation

B Potential data corruption or unpredictable behavior due to misaligned memory access

C The CPU will raise a syntax error and halt execution

D The program will automatically realign the stack without any issues

💡 Hint

Think about hardware requirements for memory access alignment.

Violating the 8-byte stack alignment can cause misaligned memory accesses, which may lead to data corruption or unpredictable program behavior on ARM processors.

Practice

1. According to the AAPCS, which registers are primarily used to pass the first four arguments to a subroutine?

easy

A. r0 to r3

B. r4 to r7

C. r8 to r11

D. lr and pc

Solution

1. Step 1: Understand argument passing in AAPCS

   The AAPCS specifies that the first four arguments to a subroutine are passed using registers r0, r1, r2, and r3.

2. Step 2: Identify the correct register range

   Registers r4 to r11 are used for other purposes, and lr (link register) stores the return address, not arguments.

3. Final Answer:

   r0 to r3 -> Option A

4. Quick Check:

   Arguments passed in r0-r3 [OK]

Hint: Remember: first 4 args in r0-r3 registers [OK]

Common Mistakes:

• Confusing argument registers with callee-saved registers
• Thinking lr or pc hold arguments
• Assuming stack is always used first

2. Which register is used to store the return address when a subroutine is called under AAPCS?

easy

A. lr

B. r0

C. pc

D. sp

Solution

1. Step 1: Identify the purpose of the link register (lr)

   In AAPCS, the link register (lr) holds the return address when a subroutine is called.

2. Step 2: Differentiate from other registers

   r0 is for return values, pc is the program counter (current instruction), and sp is the stack pointer, not for return addresses.

3. Final Answer:

   lr -> Option A

4. Quick Check:

   Return address stored in lr [OK]

Hint: Return address always saved in lr register [OK]

Common Mistakes:

• Confusing lr with pc (program counter)
• Thinking r0 holds return address
• Assuming sp stores return address

3. Consider a subroutine that takes 5 integer arguments. According to AAPCS, how are these arguments passed?

medium

A. All 5 arguments passed in r0 to r4

B. First 4 in r0 to r3, 5th on the stack

C. All 5 arguments passed on the stack

D. First 3 in r0 to r2, remaining 2 in r3 and r4

Solution

1. Step 1: Recall argument passing rules for more than 4 arguments

   AAPCS passes the first 4 arguments in registers r0 to r3. Any additional arguments are passed on the stack.

2. Step 2: Apply to 5 arguments

   For 5 arguments, the first 4 go into r0-r3, and the 5th argument is placed on the stack.

3. Final Answer:

   First 4 in r0 to r3, 5th on the stack -> Option B

4. Quick Check:

   Extra args beyond 4 go on stack [OK]

Hint: Only first 4 args in registers; rest go on stack [OK]

Common Mistakes:

• Assuming all args fit in registers
• Passing 5th arg in r4 incorrectly
• Ignoring stack usage for extra args

4. A programmer notices that after a subroutine call, the value in register r4 is unexpectedly changed. What is the most likely cause under AAPCS?

medium

A. r4 is a caller-saved register and was not preserved by the caller

B. r4 holds the return address and was corrupted

C. r4 is used to pass arguments and was overwritten

D. r4 is a callee-saved register and the callee did not save it

Solution

1. Step 1: Understand register saving responsibilities

   Under AAPCS, registers r4 to r11 are callee-saved, meaning the called function must save and restore them if it uses them.

2. Step 2: Identify the cause of unexpected change

   If r4 changed unexpectedly, it means the callee did not save and restore it properly, causing corruption.

3. Final Answer:

   r4 is a callee-saved register and the callee did not save it -> Option D

4. Quick Check:

   Callee must save r4-r11 [OK]

Hint: Callee saves r4-r11; caller saves r0-r3 [OK]

Common Mistakes:

• Thinking r4 is caller-saved
• Confusing argument registers with saved registers
• Assuming r4 holds return address

5. You need to write a subroutine that returns a 64-bit integer result. According to AAPCS, how should the return value be passed back to the caller?

hard

A. On the stack, not in registers

B. In r0 only, using 64 bits

C. In r0 and r1 combined

D. In r2 and r3 combined

Solution

1. Step 1: Recall return value passing rules for 64-bit values

   AAPCS specifies that 64-bit return values are passed using two registers: r0 and r1 combined.

2. Step 2: Eliminate incorrect options

   r0 alone holds 32 bits, so it cannot hold 64-bit values. Stack is not used for normal return values. r2 and r3 are not used for return values.

3. Final Answer:

   In r0 and r1 combined -> Option C

4. Quick Check:

   64-bit return uses r0 and r1 [OK]

Hint: 64-bit returns use r0 and r1 registers together [OK]

Common Mistakes:

• Assuming 64-bit fits in r0 alone
• Returning via stack unnecessarily
• Using wrong registers for return