PendSV and SysTick exceptions in ARM Architecture - Cheat Sheet & Quick Revision

Recall & Review

beginner

What is the purpose of the PendSV exception in ARM Cortex-M processors?

PendSV (Pendable Service Call) is used to handle context switching in an operating system. It allows the processor to defer interrupt handling until it is safe to switch tasks.

beginner

What role does the SysTick exception play in ARM Cortex-M microcontrollers?

SysTick is a system timer exception used to generate periodic interrupts, often for creating time slices or system ticks in real-time operating systems.

intermediate

How does PendSV differ from SysTick in terms of priority and usage?

PendSV is usually set to the lowest priority to allow other interrupts to complete before a context switch, while SysTick typically has a higher priority to generate regular timing interrupts.

intermediate

Why is PendSV considered 'pendable' and how does this benefit task switching?

PendSV is 'pendable' because it can be triggered and delayed until all higher priority interrupts finish. This ensures that context switching happens safely without interrupting critical tasks.

beginner

What is a common use case for the SysTick timer in embedded systems?

SysTick is commonly used to create a regular time base for operating systems, such as generating ticks every millisecond to manage delays, timeouts, and scheduling.

What is the main function of the PendSV exception?

A To generate periodic timer interrupts

B To handle context switching in an OS

C To reset the processor

D To handle external interrupts

PendSV is designed to manage context switching by deferring the interrupt until safe to switch tasks.

Which exception is typically used to generate a regular system tick in ARM Cortex-M?

A PendSV

B HardFault

C SysTick

D NMI

SysTick is a dedicated timer exception used to generate periodic interrupts for system timing.

Why is PendSV usually assigned the lowest priority?

A To allow other interrupts to complete before switching tasks

B To speed up context switching

C To prevent it from ever running

D To handle critical faults first

PendSV runs last so that all higher priority interrupts finish before context switching.

What does the SysTick timer typically measure?

A Processor temperature

B External events

C Memory usage

D Elapsed time intervals

SysTick generates interrupts at fixed time intervals to measure elapsed time.

Which of these is true about PendSV?

A It can be pended and delayed until safe to run

B It resets the system

C It handles hardware faults

D It runs before all other interrupts

PendSV is designed to be pended and executed later, enabling safe context switching.

Explain the roles of PendSV and SysTick exceptions in ARM Cortex-M processors and how they work together in an operating system.

Think about task switching and timing in an OS.

Describe why PendSV is called a 'pendable' exception and how this feature helps in managing interrupts.

Consider interrupt priorities and safe task switching.

Practice

1. What is the primary purpose of the PendSV exception in ARM processors?

easy

A. To reset the processor

B. To provide a regular timer interrupt

C. To handle task switching smoothly in the background

D. To manage memory access

Solution

1. Step 1: Understand PendSV role

   PendSV is designed to handle context switching between tasks without interrupting the main program flow.

2. Step 2: Compare with other exceptions

   Unlike SysTick, which provides timing interrupts, PendSV is specifically for smooth task switching.

3. Final Answer:

   To handle task switching smoothly in the background -> Option C

4. Quick Check:

   PendSV = task switching [OK]

Hint: PendSV = background task switcher [OK]

Common Mistakes:

• Confusing PendSV with SysTick timer
• Thinking PendSV resets the processor
• Assuming PendSV manages memory

2. Which of the following is the correct way to enable the SysTick timer in ARM Cortex-M processors?

easy

A. Set the CTRL register's ENABLE bit to 1

B. Clear the CTRL register's ENABLE bit to 0

C. Write 0xFFFFFFFF to the LOAD register

D. Disable the PendSV exception

Solution

1. Step 1: Identify SysTick control

   The SysTick timer is controlled by the CTRL register, where setting the ENABLE bit starts the timer.

2. Step 2: Eliminate incorrect options

   Clearing ENABLE stops the timer, writing max to LOAD sets reload value but doesn't enable, and disabling PendSV is unrelated.

3. Final Answer:

   Set the CTRL register's ENABLE bit to 1 -> Option A

4. Quick Check:

   SysTick enable = CTRL ENABLE bit set [OK]

Hint: Enable SysTick by setting CTRL ENABLE bit [OK]

Common Mistakes:

• Confusing enabling with disabling bits
• Thinking LOAD register enables timer
• Mixing PendSV control with SysTick

3. Consider this simplified ARM Cortex-M code snippet:

SysTick->LOAD = 1000 - 1;
SysTick->VAL = 0;
SysTick->CTRL = 7;

What does the value 7 in SysTick->CTRL represent?

medium

A. Enable SysTick, enable interrupt, and use processor clock

B. Disable SysTick and interrupts

C. Enable SysTick only without interrupts

D. Reset SysTick counter

Solution

1. Step 1: Decode CTRL register bits

   Value 7 in binary is 0b111, meaning bits ENABLE(0), TICKINT(1), and CLKSOURCE(2) are set.

2. Step 2: Understand each bit meaning

   ENABLE starts the timer, TICKINT enables interrupt, CLKSOURCE selects processor clock.

3. Final Answer:

   Enable SysTick, enable interrupt, and use processor clock -> Option A

4. Quick Check:

   CTRL=7 means all three bits set [OK]

Hint: 7 in CTRL means enable + interrupt + clock source [OK]

Common Mistakes:

• Ignoring interrupt enable bit
• Assuming 7 disables timer
• Confusing bits order

4. A developer writes this code to trigger PendSV manually:

SCB->ICSR |= (1 << 28);

But the PendSV exception does not occur. What is the likely cause?

medium

A. ICSR register is read-only

B. SysTick timer is disabled

C. PendSV cannot be triggered manually

D. PendSV priority is not set low enough

Solution

1. Step 1: Understand PendSV triggering

   Writing to ICSR bit 28 sets the PendSV pending flag, but PendSV only runs if its priority is low enough.

2. Step 2: Identify common mistake

   If PendSV priority is higher or equal to other interrupts, it won't run even if pending.

3. Final Answer:

   PendSV priority is not set low enough -> Option D

4. Quick Check:

   PendSV priority must be low to run [OK]

Hint: PendSV needs low priority to run when pending [OK]

Common Mistakes:

• Assuming ICSR is read-only
• Thinking SysTick affects PendSV trigger
• Believing PendSV can't be triggered manually

5. In a real-time operating system (RTOS) on ARM Cortex-M, how do PendSV and SysTick work together to manage multitasking?

hard

A. PendSV triggers timer interrupts; SysTick switches tasks

B. SysTick triggers regular interrupts; PendSV performs context switching after SysTick

C. Both PendSV and SysTick handle memory management

D. SysTick disables PendSV during task switching

Solution

1. Step 1: Understand SysTick role in RTOS

   SysTick generates periodic interrupts to keep track of time slices and trigger scheduler checks.

2. Step 2: Understand PendSV role in RTOS

   PendSV is triggered by the scheduler to perform the actual task context switch smoothly in the background.

3. Step 3: Combine roles for multitasking

   SysTick signals when to switch; PendSV does the switch, enabling efficient multitasking.

4. Final Answer:

   SysTick triggers regular interrupts; PendSV performs context switching after SysTick -> Option B

5. Quick Check:

   SysTick = timer, PendSV = switcher [OK]

Hint: SysTick triggers; PendSV switches tasks [OK]

Common Mistakes:

• Swapping roles of PendSV and SysTick
• Thinking both handle memory
• Assuming SysTick disables PendSV