PendSV and SysTick exceptions in ARM Architecture - Practice Problems & Coding Challenges

Challenge - 5 Problems

🧠 Conceptual

intermediate

Understanding the purpose of PendSV exception

What is the primary role of the PendSV exception in ARM Cortex-M processors?

A To perform context switching in an operating system

B To reset the processor after a fault

C To manage external hardware interrupts

D To handle system timer interrupts for task scheduling

💡 Hint

Think about which exception is used for switching between tasks in an OS.

PendSV is designed to trigger context switches in an OS by allowing deferred interrupt handling, making it ideal for task switching.

📋 Factual

intermediate

SysTick exception timer source

Which clock source is typically used by the SysTick timer in ARM Cortex-M processors?

A External oscillator clock

B Real-time clock (RTC)

C Processor clock (core clock)

D Watchdog timer clock

💡 Hint

SysTick is designed to provide a regular interrupt based on the CPU speed.

The SysTick timer usually uses the processor's core clock to generate periodic interrupts for system timing.

🔍 Analysis

advanced

Effect of PendSV priority on system behavior

What happens if the PendSV exception priority is set higher than the SysTick exception priority in an ARM Cortex-M system?

A SysTick will always preempt PendSV regardless of priority

B PendSV will preempt SysTick, possibly delaying system tick handling

C Both exceptions will run simultaneously without preemption

D PendSV will be disabled automatically by the processor

💡 Hint

Consider how interrupt priorities affect which exception runs first.

In ARM Cortex-M, a higher priority exception can preempt a lower priority one. If PendSV has higher priority, it can interrupt SysTick, delaying its handling.

❓ Comparison

advanced

Difference between PendSV and SysTick exceptions

Which statement correctly distinguishes PendSV from SysTick exceptions?

A SysTick is a fixed priority exception; PendSV priority is programmable

B PendSV is triggered by hardware timer; SysTick is software triggered

C PendSV is a programmable system timer; SysTick is used for context switching

D SysTick generates periodic interrupts; PendSV is used for deferred interrupt handling

💡 Hint

Think about the typical use cases of each exception.

SysTick generates regular timer interrupts for system ticks, while PendSV is used to defer interrupt handling, often for context switching.

❓ Reasoning

expert

Determining the number of SysTick interrupts in a time interval

An ARM Cortex-M processor runs at 48 MHz. The SysTick timer is configured with a reload value of 47999. How many SysTick interrupts occur in one second?

A 1000 interrupts

B 480 interrupts

C 1 interrupt

D 48 interrupts

💡 Hint

Calculate the timer tick frequency and how often the reload value triggers an interrupt.

SysTick counts down from 47999 to 0 at 48 MHz clock, so interrupt frequency = 48,000,000 / (47999 + 1) = 1000 Hz, meaning 1000 interrupts per second.

Practice

1. What is the primary purpose of the PendSV exception in ARM processors?

easy

A. To reset the processor

B. To provide a regular timer interrupt

C. To handle task switching smoothly in the background

D. To manage memory access

Solution

1. Step 1: Understand PendSV role

   PendSV is designed to handle context switching between tasks without interrupting the main program flow.

2. Step 2: Compare with other exceptions

   Unlike SysTick, which provides timing interrupts, PendSV is specifically for smooth task switching.

3. Final Answer:

   To handle task switching smoothly in the background -> Option C

4. Quick Check:

   PendSV = task switching [OK]

Hint: PendSV = background task switcher [OK]

Common Mistakes:

• Confusing PendSV with SysTick timer
• Thinking PendSV resets the processor
• Assuming PendSV manages memory

2. Which of the following is the correct way to enable the SysTick timer in ARM Cortex-M processors?

easy

A. Set the CTRL register's ENABLE bit to 1

B. Clear the CTRL register's ENABLE bit to 0

C. Write 0xFFFFFFFF to the LOAD register

D. Disable the PendSV exception

Solution

1. Step 1: Identify SysTick control

   The SysTick timer is controlled by the CTRL register, where setting the ENABLE bit starts the timer.

2. Step 2: Eliminate incorrect options

   Clearing ENABLE stops the timer, writing max to LOAD sets reload value but doesn't enable, and disabling PendSV is unrelated.

3. Final Answer:

   Set the CTRL register's ENABLE bit to 1 -> Option A

4. Quick Check:

   SysTick enable = CTRL ENABLE bit set [OK]

Hint: Enable SysTick by setting CTRL ENABLE bit [OK]

Common Mistakes:

• Confusing enabling with disabling bits
• Thinking LOAD register enables timer
• Mixing PendSV control with SysTick

3. Consider this simplified ARM Cortex-M code snippet:

SysTick->LOAD = 1000 - 1;
SysTick->VAL = 0;
SysTick->CTRL = 7;

What does the value 7 in SysTick->CTRL represent?

medium

A. Enable SysTick, enable interrupt, and use processor clock

B. Disable SysTick and interrupts

C. Enable SysTick only without interrupts

D. Reset SysTick counter

Solution

1. Step 1: Decode CTRL register bits

   Value 7 in binary is 0b111, meaning bits ENABLE(0), TICKINT(1), and CLKSOURCE(2) are set.

2. Step 2: Understand each bit meaning

   ENABLE starts the timer, TICKINT enables interrupt, CLKSOURCE selects processor clock.

3. Final Answer:

   Enable SysTick, enable interrupt, and use processor clock -> Option A

4. Quick Check:

   CTRL=7 means all three bits set [OK]

Hint: 7 in CTRL means enable + interrupt + clock source [OK]

Common Mistakes:

• Ignoring interrupt enable bit
• Assuming 7 disables timer
• Confusing bits order

4. A developer writes this code to trigger PendSV manually:

SCB->ICSR |= (1 << 28);

But the PendSV exception does not occur. What is the likely cause?

medium

A. ICSR register is read-only

B. SysTick timer is disabled

C. PendSV cannot be triggered manually

D. PendSV priority is not set low enough

Solution

1. Step 1: Understand PendSV triggering

   Writing to ICSR bit 28 sets the PendSV pending flag, but PendSV only runs if its priority is low enough.

2. Step 2: Identify common mistake

   If PendSV priority is higher or equal to other interrupts, it won't run even if pending.

3. Final Answer:

   PendSV priority is not set low enough -> Option D

4. Quick Check:

   PendSV priority must be low to run [OK]

Hint: PendSV needs low priority to run when pending [OK]

Common Mistakes:

• Assuming ICSR is read-only
• Thinking SysTick affects PendSV trigger
• Believing PendSV can't be triggered manually

5. In a real-time operating system (RTOS) on ARM Cortex-M, how do PendSV and SysTick work together to manage multitasking?

hard

A. PendSV triggers timer interrupts; SysTick switches tasks

B. SysTick triggers regular interrupts; PendSV performs context switching after SysTick

C. Both PendSV and SysTick handle memory management

D. SysTick disables PendSV during task switching

Solution

1. Step 1: Understand SysTick role in RTOS

   SysTick generates periodic interrupts to keep track of time slices and trigger scheduler checks.

2. Step 2: Understand PendSV role in RTOS

   PendSV is triggered by the scheduler to perform the actual task context switch smoothly in the background.

3. Step 3: Combine roles for multitasking

   SysTick signals when to switch; PendSV does the switch, enabling efficient multitasking.

4. Final Answer:

   SysTick triggers regular interrupts; PendSV performs context switching after SysTick -> Option B

5. Quick Check:

   SysTick = timer, PendSV = switcher [OK]

Hint: SysTick triggers; PendSV switches tasks [OK]

Common Mistakes:

• Swapping roles of PendSV and SysTick
• Thinking both handle memory
• Assuming SysTick disables PendSV