NVIC advanced features in ARM Architecture - Time & Space Complexity

Time Complexity: NVIC advanced features

O(n)

Understanding Time Complexity

We want to understand how the time to handle interrupts grows when using NVIC's advanced features.

Specifically, how does the system's response time change as the number of interrupts or priorities increases?

Scenario Under Consideration

Analyze the time complexity of the following NVIC interrupt handling code snippet.

// Example: Handling multiple interrupts with priority grouping
LDR R0, =NVIC_IPR_BASE      ; Load base address of priority registers
MOV R1, #NUM_INTERRUPTS     ; Number of interrupts
MOV R2, #0                  ; Index
loop:
  LDRB R3, [R0, R2, LSL #0] ; Load priority of interrupt R2
  CMP R3, CURRENT_PRIORITY  ; Compare with current priority
  BHI skip                  ; If lower priority (higher value), skip
  BL Handle_Interrupt       ; Call interrupt handler
skip:
  ADD R2, R2, #1            ; Next interrupt
  CMP R2, R1
  BLT loop

This code checks each interrupt's priority and handles it if it meets the priority condition.

Identify Repeating Operations

Look for repeated actions in the code.

• Primary operation: Looping through all interrupts to check priorities.
• How many times: Once for each interrupt, so the number of interrupts (n).

How Execution Grows With Input

As the number of interrupts increases, the code checks each one in turn.

Input Size (n)	Approx. Operations
10	About 10 priority checks
100	About 100 priority checks
1000	About 1000 priority checks

Pattern observation: The number of operations grows directly with the number of interrupts.

Final Time Complexity

Time Complexity: O(n)

This means the time to handle interrupts grows linearly as the number of interrupts increases.

Common Mistake

[X] Wrong: "Handling interrupts with NVIC advanced features is always constant time regardless of number of interrupts."

[OK] Correct: The code must check each interrupt's priority, so more interrupts mean more checks and longer handling time.

Interview Connect

Understanding how interrupt handling time grows helps you design efficient embedded systems and shows you can reason about system performance.

Self-Check

What if the NVIC used a hardware priority encoder to select the highest priority interrupt instantly? How would the time complexity change?

Practice

1. What is the main purpose of the NVIC's priority grouping feature?

easy

A. To disable all interrupts at once

B. To balance between pre-emption priority and subpriority levels

C. To increase the clock speed of the processor

D. To reset the microcontroller

Solution

1. Step 1: Understand NVIC priority grouping

   Priority grouping allows dividing interrupt priority into pre-emption priority and subpriority.

2. Step 2: Identify the purpose of balancing priorities

   This balance controls which interrupts can pre-empt others and which are handled in order if priorities are equal.

3. Final Answer:

   To balance between pre-emption priority and subpriority levels -> Option B

4. Quick Check:

   Priority grouping = Balancing priorities [OK]

Hint: Priority grouping splits interrupt priority levels [OK]

Common Mistakes:

• Confusing priority grouping with disabling interrupts
• Thinking it changes processor speed
• Assuming it resets the device

2. Which of the following is the correct way to enable an interrupt in NVIC?

easy

A. NVIC_DisableIRQ(IRQn);

B. NVIC_SetPriority(IRQn, priority);

C. NVIC_EnableIRQ(IRQn);

D. NVIC_ClearPendingIRQ(IRQn);

Solution

1. Step 1: Identify function to enable interrupts

   The function NVIC_EnableIRQ(IRQn) is used to enable a specific interrupt.

2. Step 2: Differentiate from other NVIC functions

   NVIC_DisableIRQ disables interrupts, SetPriority sets priority, ClearPendingIRQ clears pending flags.

3. Final Answer:

   NVIC_EnableIRQ(IRQn); -> Option C

4. Quick Check:

   Enable interrupt = NVIC_EnableIRQ [OK]

Hint: Enable interrupts with NVIC_EnableIRQ function [OK]

Common Mistakes:

• Using NVIC_DisableIRQ to enable interrupts
• Confusing priority setting with enabling
• Clearing pending interrupts instead of enabling

3. Consider the following code snippet:

NVIC_SetPriorityGrouping(3);
NVIC_SetPriority(IRQn, NVIC_EncodePriority(3, 1, 2));

What does this code do?

medium

A. Sets priority grouping to 3 and assigns pre-emption priority 1 and subpriority 2 to IRQn

B. Disables IRQn interrupt

C. Enables IRQn interrupt with default priority

D. Resets priority grouping to default

Solution

1. Step 1: Analyze NVIC_SetPriorityGrouping(3)

   This sets the priority grouping to 3, defining how many bits are for pre-emption and subpriority.

2. Step 2: Decode NVIC_SetPriority call

   NVIC_EncodePriority(3, 1, 2) encodes pre-emption priority 1 and subpriority 2 according to grouping 3, then assigns it to IRQn.

3. Final Answer:

   Sets priority grouping to 3 and assigns pre-emption priority 1 and subpriority 2 to IRQn -> Option A

4. Quick Check:

   Priority grouping 3 + encoded priority = Sets priority grouping to 3 and assigns pre-emption priority 1 and subpriority 2 to IRQn [OK]

Hint: Priority grouping affects encoding of priorities [OK]

Common Mistakes:

• Assuming it disables or enables interrupts
• Ignoring priority encoding details
• Confusing priority grouping with resetting

4. A developer wrote this code to disable an interrupt but it does not work:

NVIC_EnableIRQ(IRQn);

What is the error?

medium

A. The function NVIC_EnableIRQ enables, not disables, interrupts

B. IRQn is not a valid interrupt number

C. NVIC_DisableIRQ should be called before NVIC_EnableIRQ

D. Priority must be set before disabling interrupts

Solution

1. Step 1: Understand function purpose

   NVIC_EnableIRQ enables the interrupt, so using it to disable is incorrect.

2. Step 2: Identify correct function to disable

   NVIC_DisableIRQ should be used to disable interrupts, not NVIC_EnableIRQ.

3. Final Answer:

   The function NVIC_EnableIRQ enables, not disables, interrupts -> Option A

4. Quick Check:

   EnableIRQ enables, not disables [OK]

Hint: EnableIRQ enables; use DisableIRQ to disable [OK]

Common Mistakes:

• Confusing enable and disable functions
• Assuming priority affects enabling/disabling
• Thinking order of calls disables interrupts

5. You want to ensure that a critical interrupt always pre-empts others regardless of subpriority. Which NVIC configuration achieves this?

hard

A. Use NVIC_DisableIRQ on all other interrupts

B. Set all interrupts to the same priority level

C. Disable subpriority by setting it to maximum value

D. Set priority grouping to allocate all bits to pre-emption priority and zero to subpriority

Solution

1. Step 1: Understand priority grouping effect

   Setting priority grouping to allocate all bits to pre-emption priority means subpriority is zero, so pre-emption controls interrupt order fully.

2. Step 2: Confirm this ensures critical interrupt pre-empts others

   With no subpriority bits, the critical interrupt's pre-emption priority dominates, allowing it to always pre-empt.

3. Final Answer:

   Set priority grouping to allocate all bits to pre-emption priority and zero to subpriority -> Option D

4. Quick Check:

   All bits to pre-emption priority = critical pre-emption [OK]

Hint: Maximize pre-emption bits to ensure critical interrupt priority [OK]

Common Mistakes:

• Thinking disabling subpriority means setting it high
• Assuming same priority levels allow pre-emption
• Disabling other interrupts is not practical