Vector table structure in ARM Architecture - Step-by-Step Execution

Concept Flow - Vector table structure

Reset Vector Address

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Exception Vectors Start

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Vectors for Exceptions:

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Interrupt Vectors Continue

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End of Vector Table

The vector table is a list of addresses for exception and interrupt handlers, starting with the reset vector and followed by specific exception vectors, then interrupt vectors.

Execution Sample

ARM Architecture

Vector Table:
0x00000000: Initial SP value
0x00000004: Reset Handler
0x00000008: NMI Handler
0x0000000C: HardFault Handler
...

Shows the memory layout of the vector table with addresses pointing to handler routines.

Analysis Table

Step	Vector Address	Vector Name	Content	Purpose
1	0x00000000	Initial Stack Pointer	0x20002000	Sets initial stack pointer value
2	0x00000004	Reset Handler	0x00001000	Address of reset handler code
3	0x00000008	NMI Handler	0x00001020	Address of non-maskable interrupt handler
4	0x0000000C	HardFault Handler	0x00001040	Address of hard fault handler
5	0x00000010	MemManage Handler	0x00001060	Address of memory management fault handler
6	0x00000014	BusFault Handler	0x00001080	Address of bus fault handler
7	0x00000018	UsageFault Handler	0x000010A0	Address of usage fault handler
8	0x0000001C	Reserved	0x00000000	Reserved space, not used
9	0x00000020	SVCall Handler	0x000010C0	Address of supervisor call handler
10	0x00000024	DebugMonitor Handler	0x000010E0	Address of debug monitor handler
11	0x00000028	Reserved	0x00000000	Reserved space, not used
12	0x0000002C	PendSV Handler	0x00001100	Address of pendable service call handler
13	0x00000030	SysTick Handler	0x00001120	Address of system tick timer handler
14	0x00000034	IRQ0 Handler	0x00001140	Address of interrupt request 0 handler
15	0x00000038	IRQ1 Handler	0x00001160	Address of interrupt request 1 handler
16	...	...	...	Further interrupt vectors continue
17	End	End of Vector Table		No more vectors

💡 Reached end of vector table; all exception and interrupt vectors listed

State Tracker

Vector Name	Initial Value	After Setup
Initial Stack Pointer	Undefined	0x20002000
Reset Handler	Undefined	0x00001000
NMI Handler	Undefined	0x00001020
HardFault Handler	Undefined	0x00001040
MemManage Handler	Undefined	0x00001060
BusFault Handler	Undefined	0x00001080
UsageFault Handler	Undefined	0x000010A0
SVCall Handler	Undefined	0x000010C0
DebugMonitor Handler	Undefined	0x000010E0
PendSV Handler	Undefined	0x00001100
SysTick Handler	Undefined	0x00001120
IRQ0 Handler	Undefined	0x00001140
IRQ1 Handler	Undefined	0x00001160

Key Insights - 3 Insights

Why does the vector table start with the initial stack pointer value instead of a handler address?

The first entry holds the initial stack pointer value to set up the stack before any code runs, as shown in execution_table step 1.

What happens if a reserved vector entry is used or contains a non-zero value?

Reserved entries should be zero or unused; using them incorrectly can cause unpredictable behavior, as seen in steps 8 and 11 where reserved entries hold 0x00000000.

How does the processor know which handler to run on an exception?

The processor uses the vector address corresponding to the exception type from the vector table, for example, step 4 shows the HardFault handler address.

Visual Quiz - 3 Questions

Look at the execution_table at step 2. What does the Reset Handler vector contain?

A Address of reset handler code

B Initial stack pointer value

C Reserved space

D Address of NMI handler

💡 Hint

Check the 'Content' column at step 2 in execution_table

At which step does the vector table show the SysTick Handler address?

A Step 10

B Step 13

C Step 12

D Step 14

💡 Hint

Look for 'SysTick Handler' in the 'Vector Name' column in execution_table

If the reserved entries at steps 8 and 11 had non-zero addresses, what could happen?

A Stack pointer would be reset

B Nothing, reserved entries are ignored

C Processor might jump to invalid handlers causing errors

D Reset handler would be called twice

💡 Hint

Refer to key_moments about reserved entries and their importance

Concept Snapshot

Vector Table Structure in ARM:
- Starts at fixed memory address (usually 0x00000000)
- First entry: initial stack pointer value
- Next entries: addresses of exception handlers
- Includes system exceptions and interrupts
- Reserved entries must be zero
- Processor uses vector table to jump to correct handler on exception

Full Transcript

The ARM vector table is a list of memory addresses used by the processor to handle exceptions and interrupts. It begins with the initial stack pointer value to set up the stack. Following this are addresses for various exception handlers like Reset, NMI, HardFault, and others. Reserved entries are placeholders and must be zero to avoid errors. The processor reads the vector table to find the correct handler address when an exception or interrupt occurs. This structure ensures the system responds correctly to events.