If-else implementation in assembly in ARM Architecture - Step-by-Step Execution

Concept Flow - If-else implementation in assembly

Load values into registers

↓

Compare registers

↓

Check condition flags

↓

Execute if-block

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Continue execution

The CPU loads values, compares them, sets flags, then jumps to either the if-block or else-block based on the condition, before continuing.

Execution Sample

ARM Architecture

MOV R0, #5
MOV R1, #3
CMP R0, R1
BGT if_block
else_block:
  MOV R2, #0
  B end
if_block:
  MOV R2, #1
end:

This code compares R0 and R1; if R0 > R1, it sets R2 to 1, else sets R2 to 0.

Analysis Table

Step	Instruction	Registers Before	Condition Flags	Branch Taken	Registers After
1	MOV R0, #5	R0=_, R1=_, R2=_	N=_, Z=_, C=_, V=_	No	R0=5, R1=_, R2=_
2	MOV R1, #3	R0=5, R1=_, R2=_	N=_, Z=_, C=_, V=_	No	R0=5, R1=3, R2=_
3	CMP R0, R1	R0=5, R1=3, R2=_	N=_, Z=_, C=_, V=_	No	R0=5, R1=3, R2=_ (flags updated: N=0, Z=0, C=1, V=0)
4	BGT if_block	R0=5, R1=3, R2=_	N=0, Z=0, C=1, V=0	Yes (since R0>R1)	No change
5	MOV R2, #1 (if_block)	R0=5, R1=3, R2=_	N=0, Z=0, C=1, V=0	No	R0=5, R1=3, R2=1
6	end label reached	R0=5, R1=3, R2=1	N=0, Z=0, C=1, V=0	No	Registers unchanged
Exit	Execution ends	R0=5, R1=3, R2=1	N=0, Z=0, C=1, V=0	No	Final state reached

💡 Branch taken to if_block because R0 (5) > R1 (3), so if-block executed and else-block skipped.

State Tracker

Register	Start	After Step 1	After Step 2	After Step 3	After Step 5	Final
R0	_	5	5	5	5	5
R1	_	_	3	3	3	3
R2	_	_	_	_	1	1

Key Insights - 2 Insights

Why does the program jump to the if_block instead of else_block after CMP?

Because CMP sets condition flags based on R0 - R1. Since R0=5 is greater than R1=3, the BGT (branch if greater than) condition is true, so the jump goes to if_block as shown in execution_table step 4.

What happens if the condition is false? How does the else_block execute?

If the condition was false (e.g., R0 <= R1), BGT would not branch, so execution continues to else_block instructions. This is shown by the absence of branch in step 4 and execution of else_block instructions instead.

Visual Quiz - 3 Questions

Look at the execution_table at step 4. What condition flags indicate the branch to if_block?

A N=1, Z=0, C=0, V=1

B N=0, Z=1, C=1, V=0

C N=0, Z=0, C=1, V=0

D N=1, Z=1, C=0, V=0

💡 Hint

Check the 'Condition Flags' column at step 4 in the execution_table.

At which step does R2 get its final value assigned?

A Step 5

B Step 3

C Step 2

D Step 6

💡 Hint

Look at the 'Registers After' column for R2 in the execution_table.

If R0 was 2 and R1 was 3, which branch would be taken?

A Branch to if_block

B No branch, continue sequentially

C Branch to else_block

D Program would crash

💡 Hint

Refer to the logic in concept_flow and how BGT depends on R0 > R1.

Concept Snapshot

If-else in ARM assembly:
- Use CMP to compare two registers.
- CMP sets condition flags (N, Z, C, V).
- Use conditional branch (e.g., BGT) to jump if condition true.
- If branch taken, execute if-block; else execute else-block.
- Continue after blocks with labels and unconditional branch if needed.

Full Transcript

This visual execution trace shows how an if-else structure is implemented in ARM assembly. First, values are loaded into registers R0 and R1. Then CMP compares R0 and R1, setting condition flags. The BGT instruction checks if R0 is greater than R1 by examining flags. If true, it branches to the if_block where R2 is set to 1. Otherwise, it executes the else_block setting R2 to 0. The variable tracker shows how registers change step-by-step. Key moments clarify why branching happens based on flags. The quiz tests understanding of flags, register changes, and branch decisions.