Exception entry and exit sequence in ARM Architecture - Time & Space Complexity

Time Complexity: Exception entry and exit sequence

O(n)

Understanding Time Complexity

When the processor handles an exception, it runs a special sequence of steps to save its state and jump to the exception handler.

We want to understand how the time taken by this sequence changes as the system or input changes.

Scenario Under Consideration

Analyze the time complexity of the following ARM exception entry and exit sequence.

    SUB   SP, SP, #32       ; Make space on stack
    STMFD SP!, {R0-R3, LR} ; Save registers
    LDR   R0, =ExceptionHandler
    BX    R0               ; Branch to handler

    ; Exception exit sequence
    LDMFD SP!, {R0-R3, LR} ; Restore registers
    ADD   SP, SP, #32      ; Restore stack pointer
    BX    LR               ; Return from exception
    

This code saves some registers and stack space on exception entry, then restores them on exit.

Identify Repeating Operations

Look for repeated or costly steps in the sequence.

• Primary operation: Saving and restoring multiple registers using STMFD and LDMFD instructions.
• How many times: Each register saved/restored counts as one operation, done once per exception.

How Execution Grows With Input

The time depends on how many registers are saved and restored.

Input Size (number of registers)	Approx. Operations
4	10 (5 saved + 5 restored)
8	18 (9 saved + 9 restored)
16	34 (17 saved + 17 restored)

Pattern observation: The time grows linearly with the number of registers saved and restored.

Final Time Complexity

Time Complexity: O(n)

This means the time to enter and exit an exception grows directly with how many registers are saved and restored.

Common Mistake

[X] Wrong: "The exception entry time is always constant regardless of saved registers."

[OK] Correct: Saving more registers means more instructions run, so the time increases with the number of registers.

Interview Connect

Understanding how exception handling time grows helps you write efficient low-level code and reason about system responsiveness.

Self-Check

"What if the exception sequence saved only the minimum registers needed? How would that affect the time complexity?"