Route planning for two-layer board in PCB Design - Cell-by-Cell Formula Trace

Sample Data

This data shows two nets to be routed on a two-layer PCB. Each net has start and end coordinates (X,Y) and the layer (Top or Bottom) where the route should be planned.

Cell	Value
A1	Net
B1	Start X
C1	Start Y
D1	End X
E1	End Y
F1	Layer
A2	Net1
B2	2
C2	3
D2	7
E2	3
F2	Top
A3	Net2
B3	5
C3	1
D3	5
E3	6
F3	Bottom

Formula Trace

RouteLength = ABS(D2 - B2) + ABS(E2 - C2)

Step 1: ABS(7 - 2)

Step 2: ABS(3 - 3)

Step 3: 5 + 0

Cell Reference Map

    A      B      C      D      E      F
1 | Net  | StartX| StartY| EndX  | EndY  | Layer |
2 | Net1 |   2   |   3   |   7   |   3   | Top   |
3 | Net2 |   5   |   1   |   5   |   6   | Bottom|

The formula references cells B2, C2, D2, and E2 to calculate the route length for Net1.

Result

    A      B      C      D      E      F      G
1 | Net  | StartX| StartY| EndX  | EndY  | Layer | RouteLength |
2 | Net1 |   2   |   3   |   7   |   3   | Top   |     5      |
3 | Net2 |   5   |   1   |   5   |   6   | Bottom|             |

The RouteLength column shows the calculated route length for Net1 as 5 units, which is the sum of horizontal and vertical distances between start and end points on the Top layer.

Sheet Trace Quiz - 3 Questions

What is the horizontal distance calculated for Net1?

A 5

B 0

C 3

D 7

Key Result

RouteLength = ABS(EndX - StartX) + ABS(EndY - StartY) calculates Manhattan distance for routing on a layer.

Practice

1. What is the main advantage of using two layers in PCB route planning?

easy

A. Separating signals and power to reduce interference

B. Making the board heavier

C. Increasing the number of components

D. Reducing the cost of materials

Solution

1. Step 1: Understand layer usage in PCB design

   Two layers allow separating signal traces and power/ground planes, which reduces electrical noise and interference.

2. Step 2: Identify the benefit of separation

   Separating signals and power improves signal integrity and reduces crosstalk between traces.

3. Final Answer:

   Separating signals and power to reduce interference -> Option A

4. Quick Check:

   Two layers separate signals and power [OK]

Hint: Two layers separate signals and power for less noise [OK]

Common Mistakes:

• Thinking two layers just add weight
• Assuming more components fit automatically
• Believing cost always decreases with two layers

2. Which of the following is the correct way to represent a via connecting top and bottom layers in a PCB design file?

easy

A. via(top-bottom)

B. via(top, bottom)

C. via(top_layer, bottom_layer)

D. via(top;bottom)

Solution

1. Step 1: Review correct syntax for via definition

   In PCB design files, vias are typically defined with two layers separated by a comma inside parentheses.

2. Step 2: Identify the correct syntax among options

   via(top_layer, bottom_layer) uses via(top_layer, bottom_layer) which is the standard and syntactically correct format.

3. Final Answer:

   <code>via(top_layer, bottom_layer)</code> -> Option C

4. Quick Check:

   Via syntax uses comma between layers [OK]

Hint: Use comma to separate layers in via syntax [OK]

Common Mistakes:

• Using hyphens or semicolons instead of commas
• Missing parentheses around layers
• Incorrect layer names or casing

3. Given the following route plan code snippet, what is the total number of vias used?

routes = [
  {"start": "A", "end": "B", "layer": "top"},
  {"start": "B", "end": "C", "layer": "bottom"},
  {"start": "C", "end": "D", "layer": "top"}
]
vias = [route for route in routes if route["layer"] != routes[routes.index(route)-1]["layer"]]
print(len(vias))

medium

A. 0

B. 2

C. 1

D. 3

Solution

1. Step 1: Analyze the route layers sequence

   The layers are: top (A-B), bottom (B-C), top (C-D). Changes occur from top to bottom and bottom to top.

2. Step 2: Count layer changes indicating vias

   There are two layer changes: top to bottom and bottom to top, so two vias are needed.

3. Final Answer:

   2 -> Option B

4. Quick Check:

   Layer changes = number of vias = 2 [OK]

Hint: Count layer switches to find vias needed [OK]

Common Mistakes:

• Counting all routes as vias
• Ignoring first route layer
• Misreading layer sequence

4. You have this route planning code snippet that throws an error:

routes = [
  {"start": "X", "end": "Y", "layer": "top"},
  {"start": "Y", "end": "Z", "layer": "bottom"}
]
vias = [route for i, route in enumerate(routes) if route["layer"] != routes[i-1]["layer"]]
print(len(vias))

What is the cause of the error?

medium

A. Index -1 is invalid for the first element

B. Missing parentheses in list comprehension

C. Incorrect key name in route dictionary

D. Using enumerate without unpacking

Solution

1. Step 1: Identify the error cause in list comprehension

   The code accesses routes[i-1] even when i=0, causing routes[-1] which is valid in Python but may cause logic error if unintended.

2. Step 2: Understand Python negative index behavior

   Python allows negative indices, so routes[-1] accesses last element, causing incorrect comparison and logic error, not runtime error.

3. Step 3: Check if error is runtime or logic

   Since no runtime error occurs, the problem is logic error due to comparing first element with last element incorrectly.

4. Final Answer:

   Index -1 is invalid for the first element -> Option A

5. Quick Check:

   Negative index causes wrong comparison [OK]

Hint: Watch out for negative indices in loops [OK]

Common Mistakes:

• Assuming negative index causes runtime error
• Ignoring logic error from wrong comparison
• Confusing enumerate unpacking syntax

5. You need to plan routes on a two-layer PCB to connect points A, B, C, and D with minimal vias. The connections are A-B, B-C, and C-D. Which routing strategy best reduces vias?

hard

A. Route A-B and B-C on top, C-D on bottom layer

B. Alternate layers for each connection to balance load

C. Route A-B on bottom, B-C and C-D on top

D. Route all connections on the top layer only

Solution

1. Step 1: Understand via usage in layer changes

   Each time a route switches layers, a via is needed, increasing complexity and cost.

2. Step 2: Analyze options for minimal vias

   Routing all connections on the same layer (top) avoids layer switching and thus uses zero vias.

3. Step 3: Compare other options

   Alternating or mixing layers causes at least one via for each layer change, increasing vias count.

4. Final Answer:

   Route all connections on the top layer only -> Option D

5. Quick Check:

   Same layer routing means zero vias [OK]

Hint: Keep routes on one layer to avoid vias [OK]

Common Mistakes:

• Thinking alternating layers reduce vias
• Ignoring that each layer change needs a via
• Assuming balancing load is more important than vias