Route planning for two-layer board in PCB Design - Full Explanation

Introduction

Designing a circuit board with only two layers can be tricky because you need to connect many parts without wires crossing. The challenge is to find paths for all connections while using just the top and bottom layers.

Explanation

Top and Bottom Layers

A two-layer board has a top layer and a bottom layer for routing electrical connections. The top layer is usually used for signal traces and components, while the bottom layer can be used for additional routing or ground planes. Designers switch between these layers to avoid crossing wires.

Using two layers allows more routing options than a single layer by switching connections between top and bottom.

Via Usage

Vias are small holes that connect traces from the top layer to the bottom layer. They let signals jump between layers to avoid crossing other traces. However, too many vias can increase cost and complexity, so they must be used carefully.

Vias enable layer switching but should be minimized for cost and reliability.

Routing Strategies

Common strategies include routing horizontal traces on one layer and vertical traces on the other. This reduces crossing and simplifies planning. Designers also prioritize critical signals and keep power and ground lines wide and short.

Organizing trace directions by layer helps prevent crossing and simplifies routing.

Design Rules and Constraints

Design rules set limits on trace width, spacing, and via size to ensure electrical performance and manufacturability. Constraints like component placement and board size also affect routing choices. Following these rules avoids shorts and signal problems.

Adhering to design rules ensures a functional and manufacturable board.

Real World Analogy

Imagine a two-story house where you need to run wires from switches to lights without crossing wires on the same floor. You can run wires on the first floor going left to right and on the second floor going front to back, using stairs (vias) to switch floors when needed.

Top and Bottom Layers → First and second floors of the house where wires run in different directions

Via Usage → Stairs that let wires move between floors to avoid crossing

Routing Strategies → Planning wire directions on each floor to keep them from crossing

Design Rules and Constraints → Building codes and space limits that guide how wires and stairs are placed

Diagram

Diagram

┌───────────────┐       ┌───────────────┐
│ Top Layer     │──────▶│ Horizontal    │
│ (Traces run  │       │ traces        │
│  left-right) │       └───────────────┘
│               │
│   ┌─────┐     │       ┌───────────────┐
│   │Via  │────▶│       │ Vertical      │
│   └─────┘     │       │ traces on     │
│ Bottom Layer  │──────▶│ bottom layer  │
│ (Traces run  │       └───────────────┘
│  up-down)    │
└───────────────┘

Diagram showing top layer with horizontal traces, bottom layer with vertical traces, and vias connecting layers.

Key Facts

Two-layer PCB → A printed circuit board with two conductive layers for routing signals.

Via → A plated hole that connects electrical traces between the top and bottom layers.

Trace → A conductive path on a PCB that connects components.

Routing Strategy → A planned approach to organize trace directions and layer usage to avoid crossing.

Design Rules → Constraints on trace width, spacing, and via size to ensure board functionality.

Common Confusions

Believing vias can be used without limit to solve routing problems.

Believing vias can be used without limit to solve routing problems. Vias add cost and can affect signal quality, so they should be used sparingly and strategically.

Thinking traces can cross on the same layer without issues.

Thinking traces can cross on the same layer without issues. Traces on the same layer cannot cross without causing shorts; layer switching or careful routing is needed.

Assuming design rules are optional guidelines.

Assuming design rules are optional guidelines. Design rules are mandatory to prevent electrical failures and manufacturing defects.

Summary

Two-layer boards use top and bottom layers to route connections by switching layers to avoid crossing wires.

Vias connect traces between layers but should be minimized to reduce cost and complexity.

Organizing trace directions and following design rules ensures a functional and manufacturable PCB.

Practice

1. What is the main advantage of using two layers in PCB route planning?

easy

A. Separating signals and power to reduce interference

B. Making the board heavier

C. Increasing the number of components

D. Reducing the cost of materials

Solution

1. Step 1: Understand layer usage in PCB design

   Two layers allow separating signal traces and power/ground planes, which reduces electrical noise and interference.

2. Step 2: Identify the benefit of separation

   Separating signals and power improves signal integrity and reduces crosstalk between traces.

3. Final Answer:

   Separating signals and power to reduce interference -> Option A

4. Quick Check:

   Two layers separate signals and power [OK]

Hint: Two layers separate signals and power for less noise [OK]

Common Mistakes:

• Thinking two layers just add weight
• Assuming more components fit automatically
• Believing cost always decreases with two layers

2. Which of the following is the correct way to represent a via connecting top and bottom layers in a PCB design file?

easy

A. via(top-bottom)

B. via(top, bottom)

C. via(top_layer, bottom_layer)

D. via(top;bottom)

Solution

1. Step 1: Review correct syntax for via definition

   In PCB design files, vias are typically defined with two layers separated by a comma inside parentheses.

2. Step 2: Identify the correct syntax among options

   via(top_layer, bottom_layer) uses via(top_layer, bottom_layer) which is the standard and syntactically correct format.

3. Final Answer:

   <code>via(top_layer, bottom_layer)</code> -> Option C

4. Quick Check:

   Via syntax uses comma between layers [OK]

Hint: Use comma to separate layers in via syntax [OK]

Common Mistakes:

• Using hyphens or semicolons instead of commas
• Missing parentheses around layers
• Incorrect layer names or casing

3. Given the following route plan code snippet, what is the total number of vias used?

routes = [
  {"start": "A", "end": "B", "layer": "top"},
  {"start": "B", "end": "C", "layer": "bottom"},
  {"start": "C", "end": "D", "layer": "top"}
]
vias = [route for route in routes if route["layer"] != routes[routes.index(route)-1]["layer"]]
print(len(vias))

medium

A. 0

B. 2

C. 1

D. 3

Solution

1. Step 1: Analyze the route layers sequence

   The layers are: top (A-B), bottom (B-C), top (C-D). Changes occur from top to bottom and bottom to top.

2. Step 2: Count layer changes indicating vias

   There are two layer changes: top to bottom and bottom to top, so two vias are needed.

3. Final Answer:

   2 -> Option B

4. Quick Check:

   Layer changes = number of vias = 2 [OK]

Hint: Count layer switches to find vias needed [OK]

Common Mistakes:

• Counting all routes as vias
• Ignoring first route layer
• Misreading layer sequence

4. You have this route planning code snippet that throws an error:

routes = [
  {"start": "X", "end": "Y", "layer": "top"},
  {"start": "Y", "end": "Z", "layer": "bottom"}
]
vias = [route for i, route in enumerate(routes) if route["layer"] != routes[i-1]["layer"]]
print(len(vias))

What is the cause of the error?

medium

A. Index -1 is invalid for the first element

B. Missing parentheses in list comprehension

C. Incorrect key name in route dictionary

D. Using enumerate without unpacking

Solution

1. Step 1: Identify the error cause in list comprehension

   The code accesses routes[i-1] even when i=0, causing routes[-1] which is valid in Python but may cause logic error if unintended.

2. Step 2: Understand Python negative index behavior

   Python allows negative indices, so routes[-1] accesses last element, causing incorrect comparison and logic error, not runtime error.

3. Step 3: Check if error is runtime or logic

   Since no runtime error occurs, the problem is logic error due to comparing first element with last element incorrectly.

4. Final Answer:

   Index -1 is invalid for the first element -> Option A

5. Quick Check:

   Negative index causes wrong comparison [OK]

Hint: Watch out for negative indices in loops [OK]

Common Mistakes:

• Assuming negative index causes runtime error
• Ignoring logic error from wrong comparison
• Confusing enumerate unpacking syntax

5. You need to plan routes on a two-layer PCB to connect points A, B, C, and D with minimal vias. The connections are A-B, B-C, and C-D. Which routing strategy best reduces vias?

hard

A. Route A-B and B-C on top, C-D on bottom layer

B. Alternate layers for each connection to balance load

C. Route A-B on bottom, B-C and C-D on top

D. Route all connections on the top layer only

Solution

1. Step 1: Understand via usage in layer changes

   Each time a route switches layers, a via is needed, increasing complexity and cost.

2. Step 2: Analyze options for minimal vias

   Routing all connections on the same layer (top) avoids layer switching and thus uses zero vias.

3. Step 3: Compare other options

   Alternating or mixing layers causes at least one via for each layer change, increasing vias count.

4. Final Answer:

   Route all connections on the top layer only -> Option D

5. Quick Check:

   Same layer routing means zero vias [OK]

Hint: Keep routes on one layer to avoid vias [OK]

Common Mistakes:

• Thinking alternating layers reduce vias
• Ignoring that each layer change needs a via
• Assuming balancing load is more important than vias