Route planning for two-layer board in PCB Design - Practice Problems & Coding Challenges

Challenge - 5 Problems

🧠 Conceptual

intermediate

Understanding Layer Usage in Two-Layer PCB Routing

In a two-layer PCB, how are the layers typically used for routing signals?

A Top layer for horizontal traces, bottom layer for vertical traces

B Top layer for power, bottom layer for ground only

C Both layers used interchangeably without any specific pattern

D Top layer for ground, bottom layer for signals

💡 Hint

Think about how to minimize crossing and simplify routing.

Typically, the top layer routes horizontal signals and the bottom layer routes vertical signals to reduce crossing and simplify routing.

❓ dax_lod_result

intermediate

Calculate Total Trace Length per Layer

Given a dataset of trace segments with their lengths and layer info, which DAX measure correctly calculates the total trace length on the top layer?

PCB Design

TraceData = DATATABLE(
  "TraceID", INTEGER,
  "Length_mm", FLOAT,
  "Layer", STRING,
  {
    {1, 10.5, "Top"},
    {2, 5.0, "Bottom"},
    {3, 7.2, "Top"},
    {4, 3.3, "Bottom"}
  }
)

A TotalTopLength = CALCULATE(SUM(TraceData[Length_mm]), FILTER(TraceData, TraceData[Layer] = "Top"))

B TotalTopLength = CALCULATE(SUM(TraceData[Length_mm]), FILTER(TraceData, TraceData[Layer] = "Bottom"))

C TotalTopLength = SUM(TraceData[Length_mm]) WHERE TraceData[Layer] = "Top"

D TotalTopLength = SUMX(FILTER(TraceData, TraceData[Layer] = "Top"), TraceData[Length_mm])

💡 Hint

Remember that CALCULATE requires filter expressions or FILTER function for conditions.

Option D uses SUMX with FILTER to sum lengths only where Layer is 'Top'. Option D is valid syntax but less efficient than A. Option D is invalid syntax. Option D sums bottom layer lengths, not top.

❓ visualization

advanced

Best Visualization for Layer Trace Length Comparison

You want to compare total trace lengths on top and bottom layers visually. Which chart type best shows this comparison clearly?

A Pie chart showing percentage of total trace length per layer

B Line chart showing trace length over time per layer

C Scatter plot with trace length on X-axis and layer on Y-axis

D Stacked bar chart showing total length per layer stacked by trace type

💡 Hint

Think about showing parts of a whole clearly.

A pie chart clearly shows the proportion of total trace length per layer, making it easy to compare their shares. Stacked bar is more complex and better for multiple categories. Line chart is for trends over time. Scatter plot is less intuitive here.

🔧 Formula Fix

advanced

Identify the Error in Routing Layer Assignment Logic

Review this pseudocode for assigning routing layers based on signal direction. What is the error?

if signal_direction == "horizontal":
    assign_layer = "Top"
elif signal_direction == "vertical":
    assign_layer = "Bottom"
else:
    assign_layer = "Top" or "Bottom"

A The elif condition should check for diagonal signals instead of vertical

B The else statement uses 'or' which returns a boolean, not a layer string

C The assign_layer variable is not declared before use

D The if statement should use '==' for assignment, not '='

💡 Hint

Check what 'or' returns in Python expressions.

The expression '"Top" or "Bottom"' evaluates to 'Top' always, so it does not assign both layers or a choice. It returns a string, but the use of 'or' here is misleading and may cause confusion. The code should explicitly assign one layer or handle the else case differently.

🎯 Scenario

expert

Optimizing Trace Routing on a Two-Layer Board with High-Density Components

You have a two-layer PCB with many components close together. You need to optimize routing to minimize crosstalk and signal interference. Which approach is best?

A Use the top layer for all signal traces and the bottom layer exclusively for ground plane

B Use only one layer for routing and leave the other layer empty to reduce complexity

C Route horizontal signals on the top layer and vertical signals on the bottom layer, adding ground fills on both layers

D Route signals randomly on both layers to balance trace density, without ground fills

💡 Hint

Think about signal integrity and layer usage patterns.

Routing horizontal signals on top and vertical on bottom reduces crossing and crosstalk. Adding ground fills on both layers improves shielding and reduces interference. Using one layer only or random routing increases interference risks.

Practice

1. What is the main advantage of using two layers in PCB route planning?

easy

A. Separating signals and power to reduce interference

B. Making the board heavier

C. Increasing the number of components

D. Reducing the cost of materials

Solution

1. Step 1: Understand layer usage in PCB design

   Two layers allow separating signal traces and power/ground planes, which reduces electrical noise and interference.

2. Step 2: Identify the benefit of separation

   Separating signals and power improves signal integrity and reduces crosstalk between traces.

3. Final Answer:

   Separating signals and power to reduce interference -> Option A

4. Quick Check:

   Two layers separate signals and power [OK]

Hint: Two layers separate signals and power for less noise [OK]

Common Mistakes:

• Thinking two layers just add weight
• Assuming more components fit automatically
• Believing cost always decreases with two layers

2. Which of the following is the correct way to represent a via connecting top and bottom layers in a PCB design file?

easy

A. via(top-bottom)

B. via(top, bottom)

C. via(top_layer, bottom_layer)

D. via(top;bottom)

Solution

1. Step 1: Review correct syntax for via definition

   In PCB design files, vias are typically defined with two layers separated by a comma inside parentheses.

2. Step 2: Identify the correct syntax among options

   via(top_layer, bottom_layer) uses via(top_layer, bottom_layer) which is the standard and syntactically correct format.

3. Final Answer:

   <code>via(top_layer, bottom_layer)</code> -> Option C

4. Quick Check:

   Via syntax uses comma between layers [OK]

Hint: Use comma to separate layers in via syntax [OK]

Common Mistakes:

• Using hyphens or semicolons instead of commas
• Missing parentheses around layers
• Incorrect layer names or casing

3. Given the following route plan code snippet, what is the total number of vias used?

routes = [
  {"start": "A", "end": "B", "layer": "top"},
  {"start": "B", "end": "C", "layer": "bottom"},
  {"start": "C", "end": "D", "layer": "top"}
]
vias = [route for route in routes if route["layer"] != routes[routes.index(route)-1]["layer"]]
print(len(vias))

medium

A. 0

B. 2

C. 1

D. 3

Solution

1. Step 1: Analyze the route layers sequence

   The layers are: top (A-B), bottom (B-C), top (C-D). Changes occur from top to bottom and bottom to top.

2. Step 2: Count layer changes indicating vias

   There are two layer changes: top to bottom and bottom to top, so two vias are needed.

3. Final Answer:

   2 -> Option B

4. Quick Check:

   Layer changes = number of vias = 2 [OK]

Hint: Count layer switches to find vias needed [OK]

Common Mistakes:

• Counting all routes as vias
• Ignoring first route layer
• Misreading layer sequence

4. You have this route planning code snippet that throws an error:

routes = [
  {"start": "X", "end": "Y", "layer": "top"},
  {"start": "Y", "end": "Z", "layer": "bottom"}
]
vias = [route for i, route in enumerate(routes) if route["layer"] != routes[i-1]["layer"]]
print(len(vias))

What is the cause of the error?

medium

A. Index -1 is invalid for the first element

B. Missing parentheses in list comprehension

C. Incorrect key name in route dictionary

D. Using enumerate without unpacking

Solution

1. Step 1: Identify the error cause in list comprehension

   The code accesses routes[i-1] even when i=0, causing routes[-1] which is valid in Python but may cause logic error if unintended.

2. Step 2: Understand Python negative index behavior

   Python allows negative indices, so routes[-1] accesses last element, causing incorrect comparison and logic error, not runtime error.

3. Step 3: Check if error is runtime or logic

   Since no runtime error occurs, the problem is logic error due to comparing first element with last element incorrectly.

4. Final Answer:

   Index -1 is invalid for the first element -> Option A

5. Quick Check:

   Negative index causes wrong comparison [OK]

Hint: Watch out for negative indices in loops [OK]

Common Mistakes:

• Assuming negative index causes runtime error
• Ignoring logic error from wrong comparison
• Confusing enumerate unpacking syntax

5. You need to plan routes on a two-layer PCB to connect points A, B, C, and D with minimal vias. The connections are A-B, B-C, and C-D. Which routing strategy best reduces vias?

hard

A. Route A-B and B-C on top, C-D on bottom layer

B. Alternate layers for each connection to balance load

C. Route A-B on bottom, B-C and C-D on top

D. Route all connections on the top layer only

Solution

1. Step 1: Understand via usage in layer changes

   Each time a route switches layers, a via is needed, increasing complexity and cost.

2. Step 2: Analyze options for minimal vias

   Routing all connections on the same layer (top) avoids layer switching and thus uses zero vias.

3. Step 3: Compare other options

   Alternating or mixing layers causes at least one via for each layer change, increasing vias count.

4. Final Answer:

   Route all connections on the top layer only -> Option D

5. Quick Check:

   Same layer routing means zero vias [OK]

Hint: Keep routes on one layer to avoid vias [OK]

Common Mistakes:

• Thinking alternating layers reduce vias
• Ignoring that each layer change needs a via
• Assuming balancing load is more important than vias