What if your system could instantly know which task is most urgent and act on it first?
Why Interrupt priority levels in Embedded C? - Purpose & Use Cases
Imagine you are managing a busy kitchen where multiple orders come in at the same time. You try to handle each order one by one without any priority. Suddenly, a VIP customer arrives with a special request, but you are stuck finishing a simple order first.
Handling all tasks in the order they arrive can cause delays for urgent tasks. Without a way to prioritize, important events get stuck behind less important ones, causing slow response and mistakes.
Interrupt priority levels let the system decide which tasks are more urgent. High priority tasks can interrupt lower priority ones, so important events get immediate attention, making the system faster and more reliable.
void ISR() {
// handle all interrupts equally
if (interrupt1) handle1();
if (interrupt2) handle2();
}void ISR() {
if (high_priority_interrupt) handleHigh();
else if (low_priority_interrupt) handleLow();
}It enables fast and organized handling of multiple events, ensuring critical tasks are never delayed.
In a car, the airbag system must respond immediately to a crash sensor, even if the radio or other systems are busy. Interrupt priority levels make this possible.
Without priority, urgent tasks get delayed.
Interrupt priority levels let important tasks interrupt less important ones.
This improves system speed and reliability in real-time situations.
Practice
What does a lower interrupt priority number mean in embedded C?
Solution
Step 1: Understand priority numbering
In embedded C, interrupt priority levels are numbered so that lower numbers mean higher priority.Step 2: Interpret priority effect
Therefore, an interrupt with a lower number runs before interrupts with higher numbers.Final Answer:
It has higher priority and runs before others -> Option CQuick Check:
Lower number = higher priority [OK]
- Thinking higher number means higher priority
- Confusing priority with interrupt enable/disable
- Assuming priority affects CPU idle time
Which of the following is the correct way to set an interrupt priority level to 2 in embedded C?
void setup_interrupt() {
// Set priority here
}Solution
Step 1: Identify correct function to set priority
NVIC_SetPriority is the standard function to set interrupt priority in embedded C.Step 2: Check correct priority value
Passing 2 as the priority sets the interrupt priority level to 2 correctly.Final Answer:
NVIC_SetPriority(IRQn, 2); -> Option BQuick Check:
Use NVIC_SetPriority with numeric level [OK]
- Using NVIC_EnableIRQ to set priority
- Passing symbolic constants instead of numbers
- Setting priority to a value outside allowed range
Given the following code snippet, what will be the order of interrupt execution if both interrupts occur simultaneously?
NVIC_SetPriority(IRQn_UART, 3);
NVIC_SetPriority(IRQn_TIMER, 1);
// Both UART and TIMER interrupts triggered at the same timeSolution
Step 1: Identify priority levels assigned
UART interrupt priority is set to 3, TIMER interrupt priority is set to 1.Step 2: Determine which priority is higher
Lower number means higher priority, so TIMER (1) runs before UART (3).Final Answer:
TIMER interrupt runs first, then UART -> Option AQuick Check:
Lower priority number runs first [OK]
- Assuming higher number runs first
- Thinking interrupts run simultaneously
- Ignoring priority settings
Identify the error in this code snippet that sets interrupt priorities:
NVIC_SetPriority(IRQn_ADC, 5);
NVIC_SetPriority(IRQn_ADC, 0);
NVIC_EnableIRQ(IRQn_ADC);What is the problem?
Solution
Step 1: Analyze priority assignments
The code sets priority 5 first, then overwrites it with priority 0 for the same interrupt.Step 2: Understand priority effect
Priority 0 is higher priority than 5, so the last setting (0) is effective.Final Answer:
Priority 0 is higher than priority 5, so last setting wins -> Option DQuick Check:
Last priority set is used [OK]
- Thinking priority 0 is invalid
- Assuming multiple priorities combine
- Ignoring order of calls
You have three interrupts: IRQn_A, IRQn_B, and IRQn_C. You want IRQn_B to run first, then IRQn_C, and finally IRQn_A. Which priority settings achieve this?
Solution
Step 1: Understand priority order needed
IRQn_B should run first, then IRQn_C, then IRQn_A last.Step 2: Assign priorities accordingly
Lower number means higher priority, so IRQn_B = 1, IRQn_C = 2, IRQn_A = 3 matches the desired order.Final Answer:
IRQn_B = 1, IRQn_C = 2, IRQn_A = 3 -> Option AQuick Check:
Lower number runs first [OK]
- Assigning higher numbers for higher priority
- Mixing up interrupt names and priorities
- Not following the required order
Ready to prove it?
Pass the test and this pattern moves unknown
