What is an interrupt priority level in embedded systems?
An interrupt priority level is a number that tells the system which interrupt is more important. Higher priority interrupts can stop lower priority ones to be handled first.
Click to reveal answer
beginner
Why do we use interrupt priority levels?
We use interrupt priority levels to manage multiple interrupts. This helps the system respond quickly to important events without ignoring less urgent ones.
Click to reveal answer
intermediate
How does a higher priority interrupt affect a lower priority interrupt?
A higher priority interrupt can pause or 'preempt' a lower priority interrupt. The system handles the higher priority interrupt first, then returns to the lower one.
Click to reveal answer
intermediate
In embedded C, how do you typically set interrupt priority levels?
You set interrupt priority levels using special registers or functions provided by the microcontroller's library, often by assigning a priority number to each interrupt source.
Click to reveal answer
intermediate
What happens if two interrupts have the same priority level?
If two interrupts have the same priority, the system usually handles them in the order they occur or based on a fixed hardware scheme, but they do not preempt each other.
Click to reveal answer
What does a higher interrupt priority level mean?
AIt is ignored by the system
BIt runs only after all lower priority interrupts
CIt is handled before lower priority interrupts
DIt disables all interrupts
✗ Incorrect
Higher priority interrupts are handled first, preempting lower priority ones.
How are interrupt priorities usually assigned in embedded C?
ABy writing interrupt code in a specific order
BBy setting priority numbers in special registers
CBy disabling interrupts globally
DBy using delay loops
✗ Incorrect
Interrupt priorities are set by assigning numbers in hardware registers or using library functions.
What happens if a lower priority interrupt is running and a higher priority interrupt occurs?
AThe lower priority interrupt is paused and the higher priority interrupt runs
BThe lower priority interrupt continues without interruption
CBoth interrupts run at the same time
DThe system crashes
✗ Incorrect
Higher priority interrupts preempt lower priority ones to be handled first.
If two interrupts have the same priority, how does the system decide which to handle first?
AUsually by the order they occur or hardware scheme
BThe system ignores both
CThe system merges them into one interrupt
DThe system randomly picks one
✗ Incorrect
Same priority interrupts are handled in occurrence order or by fixed hardware rules.
Why is it important to assign correct interrupt priority levels?
ATo disable all interrupts
BTo slow down the system
CTo avoid using interrupts
DTo ensure critical tasks are handled quickly
✗ Incorrect
Correct priorities help the system respond fast to important events.
Explain how interrupt priority levels help manage multiple interrupts in an embedded system.
Think about which interrupt runs first and how the system decides.
You got /4 concepts.
Describe how you would set interrupt priority levels in embedded C code.
Consider hardware registers or API calls.
You got /4 concepts.
Practice
(1/5)
1.
What does a lower interrupt priority number mean in embedded C?
easy
A. It has lower priority and runs after others
B. It disables all other interrupts
C. It has higher priority and runs before others
D. It runs only when the CPU is idle
Solution
Step 1: Understand priority numbering
In embedded C, interrupt priority levels are numbered so that lower numbers mean higher priority.
Step 2: Interpret priority effect
Therefore, an interrupt with a lower number runs before interrupts with higher numbers.
Final Answer:
It has higher priority and runs before others -> Option C
Quick Check:
Lower number = higher priority [OK]
Hint: Lower number means higher priority, runs first [OK]
Common Mistakes:
Thinking higher number means higher priority
Confusing priority with interrupt enable/disable
Assuming priority affects CPU idle time
2.
Which of the following is the correct way to set an interrupt priority level to 2 in embedded C?
void setup_interrupt() {
// Set priority here
}
easy
A. NVIC_SetPriority(IRQn, HIGH);
B. NVIC_SetPriority(IRQn, 2);
C. NVIC_EnableIRQ(2);
D. NVIC_SetPriority(IRQn, 10);
Solution
Step 1: Identify correct function to set priority
NVIC_SetPriority is the standard function to set interrupt priority in embedded C.
Step 2: Check correct priority value
Passing 2 as the priority sets the interrupt priority level to 2 correctly.
Final Answer:
NVIC_SetPriority(IRQn, 2); -> Option B
Quick Check:
Use NVIC_SetPriority with numeric level [OK]
Hint: Use NVIC_SetPriority with number for priority [OK]
Common Mistakes:
Using NVIC_EnableIRQ to set priority
Passing symbolic constants instead of numbers
Setting priority to a value outside allowed range
3.
Given the following code snippet, what will be the order of interrupt execution if both interrupts occur simultaneously?
NVIC_SetPriority(IRQn_UART, 3);
NVIC_SetPriority(IRQn_TIMER, 1);
// Both UART and TIMER interrupts triggered at the same time
medium
A. TIMER interrupt runs first, then UART
B. Both run simultaneously
C. UART interrupt runs first, then TIMER
D. No interrupt runs due to conflict
Solution
Step 1: Identify priority levels assigned
UART interrupt priority is set to 3, TIMER interrupt priority is set to 1.
Step 2: Determine which priority is higher
Lower number means higher priority, so TIMER (1) runs before UART (3).
Final Answer:
TIMER interrupt runs first, then UART -> Option A
Quick Check:
Lower priority number runs first [OK]
Hint: Lower priority number runs before higher [OK]
Common Mistakes:
Assuming higher number runs first
Thinking interrupts run simultaneously
Ignoring priority settings
4.
Identify the error in this code snippet that sets interrupt priorities:
D. Priority 0 is higher than priority 5, so last setting wins
Solution
Step 1: Analyze priority assignments
The code sets priority 5 first, then overwrites it with priority 0 for the same interrupt.
Step 2: Understand priority effect
Priority 0 is higher priority than 5, so the last setting (0) is effective.
Final Answer:
Priority 0 is higher than priority 5, so last setting wins -> Option D
Quick Check:
Last priority set is used [OK]
Hint: Last priority set is effective [OK]
Common Mistakes:
Thinking priority 0 is invalid
Assuming multiple priorities combine
Ignoring order of calls
5.
You have three interrupts: IRQn_A, IRQn_B, and IRQn_C. You want IRQn_B to run first, then IRQn_C, and finally IRQn_A. Which priority settings achieve this?
hard
A. IRQn_B = 1, IRQn_C = 2, IRQn_A = 3
B. IRQn_A = 1, IRQn_B = 2, IRQn_C = 3
C. IRQn_C = 1, IRQn_A = 2, IRQn_B = 3
D. IRQn_B = 3, IRQn_C = 2, IRQn_A = 1
Solution
Step 1: Understand priority order needed
IRQn_B should run first, then IRQn_C, then IRQn_A last.
Step 2: Assign priorities accordingly
Lower number means higher priority, so IRQn_B = 1, IRQn_C = 2, IRQn_A = 3 matches the desired order.
Final Answer:
IRQn_B = 1, IRQn_C = 2, IRQn_A = 3 -> Option A
Quick Check:
Lower number runs first [OK]
Hint: Assign lower numbers to interrupts needing higher priority [OK]
Common Mistakes:
Assigning higher numbers for higher priority
Mixing up interrupt names and priorities
Not following the required order
Recommended
Ready to prove it?
Pass the test and this pattern moves unknownstrongwhile earning +1 Grip toward your certificate.