Peripheral clock enable in ARM Architecture - Interactive Code Practice

Practice - 5 Tasks

1fill in blank

easy

Complete the code to enable the clock for GPIO port A.

ARM Architecture

RCC->AHB1ENR |= [1];

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AENABLE_GPIOA

BGPIOA_CLK_ENABLE

CRCC_AHB1ENR_GPIOAEN

DCLK_GPIOA_EN

Attempts:

3 left

💡 Hint

Common Mistakes

Using a macro that does not exist or is not defined for GPIOA clock enable.

Confusing GPIOA clock enable with other peripheral clock enables.

The correct macro to enable the clock for GPIO port A in the RCC AHB1 peripheral clock enable register is RCC_AHB1ENR_GPIOAEN.

2fill in blank

medium

Complete the code to enable the clock for USART2 peripheral.

ARM Architecture

RCC->[1] |= RCC_APB1ENR_USART2EN;

Drag options to blanks, or click blank then click option'

AAPB1ENR

BAPB2ENR

CAHB1ENR

DAHB2ENR

Attempts:

3 left

💡 Hint

Common Mistakes

Using APB2ENR instead of APB1ENR for USART2 clock enable.

Using AHB registers which are not related to USART2.

USART2 clock is enabled via the APB1 peripheral clock enable register, so the correct register is APB1ENR.

3fill in blank

hard

Fix the error in the code to enable the clock for SPI1 peripheral.

ARM Architecture

RCC->APB2ENR |= [1];

Drag options to blanks, or click blank then click option'

ARCC_APB2ENR_SPI1EN

BRCC_APB2ENR_SPI2EN

CRCC_AHB1ENR_SPI1EN

DRCC_APB1ENR_SPI1EN

Attempts:

3 left

💡 Hint

Common Mistakes

Using APB1ENR or AHB1ENR macros for SPI1 clock enable.

Using SPI2 enable macro instead of SPI1.

The SPI1 peripheral clock enable bit is located in the APB2ENR register, and the correct macro is RCC_APB2ENR_SPI1EN.

4fill in blank

hard

Fill both blanks to enable the clock for ADC1 peripheral on APB2 bus.

ARM Architecture

RCC->[1] |= [2];

Drag options to blanks, or click blank then click option'

AAPB2ENR

BAPB1ENR

CRCC_APB2ENR_ADC1EN

DRCC_APB1ENR_ADC1EN

Attempts:

3 left

💡 Hint

Common Mistakes

Using APB1ENR register or ADC1 enable macro for APB1ENR.

Mixing peripheral enable macros between APB1 and APB2.

ADC1 clock is enabled via the APB2ENR register using the macro RCC_APB2ENR_ADC1EN.

5fill in blank

hard

Fill all three blanks to enable the clock for TIM3 peripheral on APB1 bus and set the enable bit.

ARM Architecture

RCC->[1] |= [2];
TIM3->[3] = 1;

Drag options to blanks, or click blank then click option'

AAPB1ENR

BRCC_APB1ENR_TIM3EN

CCR1

DAPB2ENR

Attempts:

3 left

💡 Hint

Common Mistakes

Using APB2ENR register for TIM3 clock enable.

Using wrong macro for TIM3 enable bit.

Setting wrong register instead of CR1 to start the timer.

To enable TIM3 clock, use the APB1ENR register and the macro RCC_APB1ENR_TIM3EN. To start the timer, set the CR1 register to 1.