Exception priority levels in ARM Architecture - Step-by-Step Execution

Concept Flow - Exception priority levels

Exception Occurs

↓

Check Exception Type

↓

Determine Priority Level

↓

Compare with Current Exception

↓

Preempt

↓

Handle Exception

↓

Return to Normal Execution

When an exception occurs, the system checks its priority. If it is higher than the current one, it interrupts and handles it immediately; otherwise, it waits.

Execution Sample

ARM Architecture

Exception occurs: IRQ
Current exception: NMI
IRQ priority: 3
NMI priority: 2
Compare priorities
IRQ (3) > NMI (2)? No
Wait

This example shows how an IRQ exception with priority 3 does not preempt an NMI with priority 2.

Analysis Table

Step	Current Exception	New Exception	New Priority	Current Priority	Compare	Action
1	None	Reset	0 (highest)	None	No current exception	Handle Reset
2	Reset	NMI	2	0	2 > 0? Yes	Wait
3	Reset	IRQ	3	0	3 > 0? Yes	Wait
4	Reset	HardFault	1	0	1 > 0? Yes	Wait
5	Reset	Reset	0	0	0 > 0? No	Wait
6	Reset	None	N/A	0	No new exception	Continue handling Reset
7	None	NMI	2	None	No current exception	Handle NMI
8	NMI	IRQ	3	2	3 > 2? Yes	Wait
9	NMI	PendSV	15 (lowest)	2	15 > 2? Yes	Wait
10	NMI	None	N/A	2	No new exception	Continue handling NMI
11	None	None	N/A	None	No exceptions	Normal execution

💡 Execution stops when no new exceptions occur and current exception handling completes.

State Tracker

Variable	Start	After Step 1	After Step 7	After Step 10	Final
Current Exception	None	Reset	NMI	NMI	None
Current Priority	N/A	0	2	2	N/A
New Exception	N/A	Reset	NMI	None	None
New Priority	N/A	0	2	N/A	N/A

Key Insights - 2 Insights

Why does an IRQ with priority 3 not preempt an NMI with priority 2?

Because in ARM architecture, lower numerical priority values mean higher priority. Here, 3 is a higher number than 2, so IRQ (3) has lower priority and does not preempt NMI (2).

What happens if a new exception has the same priority as the current one?

The new exception does not preempt the current one and waits. This is shown in execution_table row 5 where Reset (0) tries to preempt Reset (0) but does not.

Visual Quiz - 3 Questions

Look at the execution_table at step 8. What is the current exception after handling the new IRQ?

A Reset

B NMI

C IRQ

D PendSV

💡 Hint

Check the 'Action' and 'Current Exception' columns at step 8 in execution_table.

At which step does the system handle the first exception with the highest priority?

A Step 1

B Step 7

C Step 4

D Step 9

💡 Hint

Look at the first time an exception is handled when no current exception exists in execution_table.

If a new exception has a priority number higher than the current one, what happens?

A It cancels the current exception

B It preempts the current exception

C It waits until current exception finishes

D It merges with the current exception

💡 Hint

Refer to the 'Compare' and 'Action' columns in execution_table rows where new priority is higher number than current.

Concept Snapshot

Exception Priority Levels in ARM:
- Lower number = higher priority
- New exception preempts current only if priority number is lower
- Equal or higher number waits
- Priority order: Reset(0) > HardFault(1) > NMI(2) > IRQ(3) ... PendSV(15)
- System handles highest priority exception first

Full Transcript

In ARM architecture, exceptions have priority levels represented by numbers. A lower number means a higher priority. When an exception occurs, the system compares its priority with the currently handled exception. If the new exception has a higher priority (lower number), it preempts the current one and is handled immediately. Otherwise, it waits until the current exception finishes. For example, Reset has the highest priority with 0, while PendSV has the lowest with 15. This priority system ensures critical exceptions are handled first. The execution table shows step-by-step how exceptions are compared and handled based on their priority numbers.

Practice

1. In ARM architecture, what does a lower exception priority number indicate?

easy

A. No priority assigned

B. Lower priority for handling the exception

C. Higher priority for handling the exception

D. Equal priority to all exceptions

Solution

1. Step 1: Understand priority numbering in ARM

   In ARM processors, exception priority levels use numbers where lower numbers mean higher priority.

2. Step 2: Interpret the meaning of lower numbers

   A lower number means the exception is handled before others with higher numbers.

3. Final Answer:

   Higher priority for handling the exception -> Option C

4. Quick Check:

   Lower number = Higher priority [OK]

Hint: Lower number means higher priority in ARM exceptions [OK]

Common Mistakes:

• Thinking higher numbers mean higher priority
• Assuming all exceptions have equal priority
• Confusing priority with exception type

2. Which of the following correctly represents the priority order in ARM exception levels from highest to lowest?

easy

A. 3, 2, 1, 0

B. 0, 1, 2, 3

C. 1, 0, 3, 2

D. 2, 3, 0, 1

Solution

1. Step 1: Recall ARM priority numbering

   Lower numbers indicate higher priority, so priority order starts from 0 upwards.

2. Step 2: Arrange numbers from lowest to highest

   The correct order from highest to lowest priority is 0, 1, 2, 3.

3. Final Answer:

   0, 1, 2, 3 -> Option B

4. Quick Check:

   Priority order = 0 to 3 [OK]

Hint: Priority order counts up from 0 as highest [OK]

Common Mistakes:

• Reversing the order thinking higher numbers are higher priority
• Mixing up the sequence of numbers
• Assuming priority starts at 1 instead of 0

3. Given these exception priorities in ARM: IRQ = 2, FIQ = 0, SVC = 1, which exception will be handled first?

medium

A. FIQ

B. IRQ

C. SVC

D. All handled simultaneously

Solution

1. Step 1: Identify priority numbers for each exception

   FIQ has priority 0, SVC has 1, IRQ has 2.

2. Step 2: Determine which priority is highest

   Lower number means higher priority, so FIQ with 0 is handled first.

3. Final Answer:

   FIQ -> Option A

4. Quick Check:

   Lowest number (0) = FIQ first [OK]

Hint: Exception with priority 0 handled first [OK]

Common Mistakes:

• Choosing IRQ because it sounds more common
• Assuming SVC is highest priority by name
• Thinking all exceptions run at the same time

4. If an ARM system incorrectly assigns a higher number to a critical exception, what is the likely problem?

medium

A. The critical exception may be delayed or ignored

B. The system will crash immediately

C. All exceptions will have equal priority

D. The critical exception will run first anyway

Solution

1. Step 1: Understand priority impact on handling

   Higher numbers mean lower priority, so a critical exception with a high number is handled later.

2. Step 2: Predict system behavior

   This delay can cause the critical exception to be delayed or missed, affecting system reliability.

3. Final Answer:

   The critical exception may be delayed or ignored -> Option A

4. Quick Check:

   Wrong priority number delays critical exception [OK]

Hint: Critical exceptions need lowest priority number [OK]

Common Mistakes:

• Assuming system crashes immediately
• Thinking priority numbers do not affect handling
• Believing all exceptions run equally regardless of priority

5. You have three exceptions with priorities: Timer = 1, UART = 3, Reset = 0. If Timer, UART, and Reset exceptions occur simultaneously, which will ARM handle first and why?

hard

A. UART, because it has the highest number

B. Timer, because it occurs first

C. Timer, because it has a medium priority

D. Reset, because it has the lowest number

Solution

1. Step 1: Identify priorities and exceptions involved

   Reset has priority 0, Timer 1, UART 3. Timer, UART, and Reset occur simultaneously.

2. Step 2: Determine which exception ARM handles first

   ARM handles the exception with the lowest priority number first, which is Reset with 0.

3. Step 3: Understand simultaneous exceptions handling

   Since Reset has the highest priority, it preempts others.

4. Final Answer:

   Reset, because it has the lowest number -> Option D

5. Quick Check:

   Lowest number = highest priority = Reset first [OK]

Hint: Lowest priority number exception handled first always [OK]

Common Mistakes:

• Overlooking Reset's highest priority
• Picking Timer due to medium priority
• Choosing UART because it occurs simultaneously