Exception priority levels in ARM Architecture - Step-by-Step Execution

Concept Flow - Exception priority levels

Exception Occurs

↓

Check Exception Type

↓

Determine Priority Level

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Compare with Current Exception

↓

Preempt

↓

Handle Exception

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Return to Normal Execution

When an exception occurs, the system checks its priority. If it is higher than the current one, it interrupts and handles it immediately; otherwise, it waits.

Execution Sample

ARM Architecture

Exception occurs: IRQ
Current exception: NMI
IRQ priority: 3
NMI priority: 2
Compare priorities
IRQ (3) > NMI (2)? No
Wait

This example shows how an IRQ exception with priority 3 does not preempt an NMI with priority 2.

Analysis Table

Step	Current Exception	New Exception	New Priority	Current Priority	Compare	Action
1	None	Reset	0 (highest)	None	No current exception	Handle Reset
2	Reset	NMI	2	0	2 > 0? Yes	Wait
3	Reset	IRQ	3	0	3 > 0? Yes	Wait
4	Reset	HardFault	1	0	1 > 0? Yes	Wait
5	Reset	Reset	0	0	0 > 0? No	Wait
6	Reset	None	N/A	0	No new exception	Continue handling Reset
7	None	NMI	2	None	No current exception	Handle NMI
8	NMI	IRQ	3	2	3 > 2? Yes	Wait
9	NMI	PendSV	15 (lowest)	2	15 > 2? Yes	Wait
10	NMI	None	N/A	2	No new exception	Continue handling NMI
11	None	None	N/A	None	No exceptions	Normal execution

💡 Execution stops when no new exceptions occur and current exception handling completes.

State Tracker

Variable	Start	After Step 1	After Step 7	After Step 10	Final
Current Exception	None	Reset	NMI	NMI	None
Current Priority	N/A	0	2	2	N/A
New Exception	N/A	Reset	NMI	None	None
New Priority	N/A	0	2	N/A	N/A

Key Insights - 2 Insights

Why does an IRQ with priority 3 not preempt an NMI with priority 2?

Because in ARM architecture, lower numerical priority values mean higher priority. Here, 3 is a higher number than 2, so IRQ (3) has lower priority and does not preempt NMI (2).

What happens if a new exception has the same priority as the current one?

The new exception does not preempt the current one and waits. This is shown in execution_table row 5 where Reset (0) tries to preempt Reset (0) but does not.

Visual Quiz - 3 Questions

Look at the execution_table at step 8. What is the current exception after handling the new IRQ?

A Reset

B NMI

C IRQ

D PendSV

💡 Hint

Check the 'Action' and 'Current Exception' columns at step 8 in execution_table.

At which step does the system handle the first exception with the highest priority?

A Step 1

B Step 7

C Step 4

D Step 9

💡 Hint

Look at the first time an exception is handled when no current exception exists in execution_table.

If a new exception has a priority number higher than the current one, what happens?

A It cancels the current exception

B It preempts the current exception

C It waits until current exception finishes

D It merges with the current exception

💡 Hint

Refer to the 'Compare' and 'Action' columns in execution_table rows where new priority is higher number than current.

Concept Snapshot

Exception Priority Levels in ARM:
- Lower number = higher priority
- New exception preempts current only if priority number is lower
- Equal or higher number waits
- Priority order: Reset(0) > HardFault(1) > NMI(2) > IRQ(3) ... PendSV(15)
- System handles highest priority exception first

Full Transcript

In ARM architecture, exceptions have priority levels represented by numbers. A lower number means a higher priority. When an exception occurs, the system compares its priority with the currently handled exception. If the new exception has a higher priority (lower number), it preempts the current one and is handled immediately. Otherwise, it waits until the current exception finishes. For example, Reset has the highest priority with 0, while PendSV has the lowest with 15. This priority system ensures critical exceptions are handled first. The execution table shows step-by-step how exceptions are compared and handled based on their priority numbers.